
Register Descriptions
(Continued)
Horizontal Flyback or Sync Duration
Register
HF_S0
HF_S1
Addr
19
1A
7
6
5
4
3
2
1
0
HFL_HS7
HFL_HS6
HFL_HS5
HFL_HS4
HFL_HS3
HFL_HS2
HFL_HS1
HFL_HS9
HFL_HS0
HFL_HS8
This is a 10 bit wide register that records the measured value of the horizontal flyback or sync in number of pixels during video
detect. Reading this register within less than one complete field period after the Video Detect Reset may give erroneous results.
This register resets to zero after the Video Detect Reset has been written.
Horizontal Back Porch Duration
Register
H_BP0
H_BP1
Addr
1B
1C
7
6
5
4
3
2
1
0
HBP7
HBP6
HBP5
HBP4
HBP3
HBP2
HBP10
HBP1
HBP9
HBP0
HBP8
This is an 11 bit wide register that records the lowest measured value of the horizontal front porch in number of pixels during video
detect. When no video is detected, the sum of this register and the HFLYBACK/HSYNC should be within 1 pixel of the total
number of pixels per line. Reading this register within less than one complete field period after the Video Detect Reset may give
erroneous results. This register resets to zero after the Video Detect Reset has been written.
Vertical Front Porch Duration
Register
V_FP0
V_FP1
Addr
1D
1E
7
6
5
4
3
2
1
0
VFP7
VFP6
VFP5
VFP4
VFP3
VFP2
VFP10
VFP1
VFP9
VFP0
VFP8
This is an 11 bit wide register that records the lowest measured value of the vertical front porch during video detect in horizontal
line periods. When no video is detected, this register will return a value of zero. Reading this register within less than one
complete field period after the Video Detect Reset may give erroneous results. This register resets to zero after the Video Detect
Reset has been written.
Vertical Sync Duration
Register
V_SYN_D
Addr
1F
7
6
5
4
3
2
1
0
VSYNC7
VSYNC6
VSYNC5
VSYNC4
VSYNC3
VSYNC2
VSYNC1
VSYNC0
This is an 8 bit wide register that records the measured value of the vertical sync during video detect in horizontal line periods.
Reading this register within less than one complete field period after the Video Detect Reset may give erroneous results. This
register resets to zero after the Video Detect Reset has been written.
Vertical Back Porch Duration
Register
V_BP0
V_BP1
Addr
20
21
7
6
5
4
3
2
1
0
VBP7
VBP6
VBP5
VBP4
VBP3
VBP2
VBP10
VBP1
VBP9
VBP0
VBP8
This is an 11 bit wide register that records the lowest measured value of the vertical back porch during video detect in horizontal
line periods. When no video is detected, the sum of this register and the VSYNC should be within 1 line of the total number of
lines per field. Reading this register within less than one complete field period after the Video Detect Reset may give erroneous
results. This register resets to zero after the Video Detect Reset has been written.
Previous Field Vertical Front Porch Duration
Register
V_FP0_PRV
V_FP1_PRV
Addr
22
23
7
6
5
4
3
2
1
0
VFP7
VFP6
VFP5
VFP4
VFP3
VFP2
VFP10
VFP1
VFP9
VFP0
VFP8
This is an 11 bit wide register that retains the previous lowest measured value of the vertical front porch during video detect in
horizontal line periods from the previous field. It is used when interlace mode is present, in order to accurately determine the
correct parameter value for the frame. When no video is detected, this register should return a value of zero. Reading this register
within less than one complete field period after the Video Detect Reset may give erroneous results. This register resets to zero
after the Video Detect Reset has been written.
Previous Field Vertical Sync Duration
Register
V_SYN_D_PRV
Addr
24
7
6
5
4
3
2
1
0
VSYNC7
VSYNC6
VSYNC5
VSYNC4
VSYNC3
VSYNC2
VSYNC1
VSYNC0
L
www.national.com
23