參數(shù)資料
型號(hào): LM1246AAA/NA
廠(chǎng)商: NATIONAL SEMICONDUCTOR CORP
元件分類(lèi): 音頻/視頻放大
英文描述: 3 CHANNEL, VIDEO PREAMPLIFIER, PDIP24
封裝: PLASTIC, DIP-24
文件頁(yè)數(shù): 35/51頁(yè)
文件大小: 2794K
代理商: LM1246AAA/NA
Pre-Amplifier Interface Registers (Continued)
Bits 6–0
This register determines the gain of the red video channel. This affects only the red channel
whereas the contrast register (0x8433) affects all channels.
Bit 7
Reserved and should be set to zero.
Contrast Control:
CONTRCTRL (0x8433)
Res’d
Contrast
X
CG[6:0]
Bits 6–0
This register determines the contrast gain and affects all three channels, blue, red and green.
Bit 7
Reserved and should be set to zero.
DAC 1 Output Level:
DAC1CTRL (0x8434)
DAC 1 Output Level
BC[7:0]
Bits 7–0
This register determines the output of DAC 1. The full-scale output is determined by bit 5 of the
DAC Config, OSD Contrast & DC Offset Register.
DAC 2 Output Level:
DAC2CTRL (0x8435)
DAC 2 Output Level
GC[7:0]
Bits 7–0
This register determines the output of DAC 2. The full-scale output is determined by bit 5 of the
DAC Config, OSD Contrast & DC Offset Register.
DAC 3 Output Level:
DAC3CTRL (0x8436)
DAC 3 Output Level
RC[7:0]
Bits 7–0
This register determines the output of DAC 3. The full-scale output is determined by bit 5 of the
DAC Config, OSD Contrast & DC Offset Register (0x8438).
DAC 4 Output Level:
DAC4CTRL (0x8437)
DAC 4 Output Level
BA[7:0]
Bits 7–0
This register determines the output of DAC 4. The output of this DAC can be scaled and mixed
with the outputs of DACs 1–3 as determined by bit 6 of the DAC Config, OSD Contrast & DC
Offset Register.
DAC Config, OSD Contrast & DC Offset:
DACOSDDCOFF (0x8438)
Res’d
DAC Options
OSD Contrast
DC Offset
X
DCF[1:0]
OSD[1:0]
DC[2:0]
Bits 2–0
These determine the DC offset of the three video outputs, blue, red and green.
Bits 4–3
These determine the contrast of the internally generated OSD.
LM1246
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
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