參數(shù)資料
型號: LG1627BXC
廠商: Lineage Power
英文描述: Clocked Laser Driver(帶時(shí)鐘輸入的激光驅(qū)動(dòng)器)
中文描述: 時(shí)鐘激光驅(qū)動(dòng)器(帶時(shí)鐘輸入的激光驅(qū)動(dòng)器)
文件頁數(shù): 5/10頁
文件大?。?/td> 287K
代理商: LG1627BXC
Data Sheet
February 1999
LG1627BXC Clocked Laser Driver
5
Lucent Technologies Inc.
Electrical Characteristics
(T
A
= 25 °C, V
SS1
= V
SS2
= V
SS3
= –5.2 V, data input = 600 mV (single ended),
and R
L
= 50
)
Minimum and maximum values are testing requirements. Typical values are characteristics of the device and are
the result of engineering evaluations. Typical values are for information purposes only and are not part of the test-
ing requirements. Stresses in excess of the absolute maximum ratings can cause permanent damage to the
device.
Table 5. Electrical Characteristics
1. Excludes I
PRE
and average I
MOD
.
Power supply current I
SS2
(relating to prebias) is dependent on V
PRE
.
Power supply current I
SS3
(relating to modulation) is dependent on V
MOD
.
2. Maximum modulation at maximum V
MOD
.
3. Maximum prebias at maximum V
PRE
.
Parameter
Symbol
Min
Typ
Max
Unit
Data Input Voltage, Single Ended
Power Supply Voltage
Power Supply Current
1
Voltage Control for Output Modulation Current
Output Minimum Modulation Current
Output Maximum Modulation Current
2
Voltage Control for Prebias Current
Output Minimum Prebias Current
Output Maximum Prebias Current
3
Mark Density, 50% Duty Cycle (1 k
to GND)
Mark Density Complement, 50% Duty Cycle
(1 k
to GND)
Pulse Width Adjust Plus
Pulse Width Adjust Negative
Output Modulation I
OUT
= 40 mA, Clock Enabled
Output Rise and Fall Times (20%—80%)
Jitter (rms)
Phase Margin
Output Modulation I
OUT
= 40 mA, Clock Disabled
Output Rise and Fall Times (20%—80%)
V
IN
300
–4.9
100
–4.0
75
–3.0
50
600
–5.2
140
0
85
0
60
–0.5
–0.5
1000
–5.5
160
–5.5
2
–5.5
0.5
mV
V
mA
V
mA
mA
V
mA
mA
V
V
V
SS1
, V
SS2
, V
SS3
I
SS1
V
MOD
I
OUT LOW
I
OUT HIGH
V
PRE
I
PRE LOW
I
PRE HIGH
MK
MK
PWP
PWN
–3.0
–3.0
–4.2
–4.2
–5.5
–5.5
V
V
t
R
, t
F
90
4
270
ps
ps
deg
t
R
, t
F
90
ps
Jitter (rms)
Output Modulation I
OUT
= 80 mA, Clock Enabled
Output Rise and Fall Times (20%—80%)
6
ps
t
R
, t
F
100
ps
Jitter (rms)
Phase Margin
Output Modulation I
OUT
= 80 mA, Clock Disabled
Output Rise and Fall Times (20%—80%)
4
ps
deg
270
t
R
, t
F
100
ps
Jitter (rms)
6
ps
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