Figure 3-8. Read/Write Mode (Normal) Note: Inp" />
參數(shù)資料
型號: LFEC15E-4FN484I
廠商: Lattice Semiconductor Corporation
文件頁數(shù): 115/163頁
文件大小: 0K
描述: IC FPGA 15.3KLUTS 484FPBGA
標(biāo)準(zhǔn)包裝: 60
系列: EC
邏輯元件/單元數(shù): 15400
RAM 位總計: 358400
輸入/輸出數(shù): 352
電源電壓: 1.14 V ~ 1.26 V
安裝類型: 表面貼裝
工作溫度: -40°C ~ 100°C
封裝/外殼: 484-BBGA
供應(yīng)商設(shè)備封裝: 484-FPBGA(23x23)
3-19
DC and Switching Characteristics
LatticeECP/EC Family Data Sheet
EBR Memory Timing Diagrams
Figure 3-8. Read/Write Mode (Normal)
Note: Input data and address are registered at the positive edge of the clock and output data appears after the positive edge of the clock.
Figure 3-9. Read/Write Mode with Input and Output Registers
A0
A1
A0
A1
D0
D1
DOA
A0
tCO_EBR
tSU tH
D0
D1
D0
DIA
ADA
WEA
CSA
CLKA
A0
A1
A0
D0
D1
output is only updated during a read cycle
A1
D0
D1
Mem(n) data from previous read
DIA
ADA
WEA
CSA
CLKA
DOA (Regs)
tSU tH
tCOO_EBR
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