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參數資料
| 型號： | LF13006 |
| 廠商： | National Semiconductor Corporation |
| 英文描述： | Digital Gain Set |
| 中文描述： | 數字增益設置 |
| 文件頁數： | 2/8頁 |
| 文件大小： | 189K |
| 代理商： | LF13006 |
Absolute Maximum Ratings
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Supply Voltage, V
a
to V
b
Supply Voltage, V
a
to GND
36V
25V
Voltage at Any Digital Input
V
a
to GND
Analog Voltage
V
a
to (V
b
a
2V)
Operating Ratings
(Note 1)
Operating Temperature Range
b
40
§
C to
a
85
§
C
Lead Temp. (Soldering, 10 seconds)
260
§
C
Electrical Characteristics
(Note 2)
Typ
Tested
Limit
(Note 4)
Design
Limit
(Note 5)
Parameter
Conditions
(Note 3)
Units
Gain Error
A
OUT
e
g
10V
ANA GND
e
0V
I
INPUT
k
10 nA
A
OUT
e
g
10V
ANA GND
e
0V
0.3
0.5
0.5
%(max)
Gain Temperature Coefficient
0.001
%/
§
C
Digital Input Voltage
Low
High
1.4
1.6
0.8
2.0
0.8
2.0
V(max)
V(min)
Digital Input Current
Low
High
V
IL
e
0V
V
IH
e
5V
All Logic Inputs Low
b
38
0.0001
b
100
1
b
100
1
m
A(max)
m
A(max)
Positive Power Supply Current
2
5
5
mA(max)
Negative Power Supply Current
All Logic Inputs Low
V
IL
e
0V, V
IH
e
5V
V
IL
e
0V, V
IH
e
5V
V
IL
e
0V, V
IH
e
5V
V
IL
e
0V, V
IH
e
5V
V
IL
e
0V, V
IH
e
5V
(Note 4)
b
1.7
b
5
150
b
5
mA(max)
Write Pulse Width, t
W
Chip Select Set-Up Time, t
CS
Chip Select Hold Time, t
CH
DIG IN Set-Up Time, t
DS
DIG IN Hold Time, t
DH
Switching Time for Gain Change
ns(min)
250
ns(min)
0
ns(min)
150
ns(min)
60
ns(min)
200
ns(max)
Switch On Resistance
3
k
X
Unit Resistance, R
15
12–18
k
X
R1 and R2 Mismatch
0.3
0.5
0.5
%(max)
%/
§
C
R1/R2 Temperature Coefficient
0.001
Note 1:
Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. DC and AC electrical specifications do not apply when operating
the device beyond its specified operating conditions.
Note 2:
Parameters are specified at V
a
e
15V and V
b
e b
15V. Min V
a
to ground voltage is 5V. Min V
a
to V
b
voltage is 5V.
Boldface numbers apply over full
operating temperature ranges.
All other numbers apply at T
A
e
T
j
e
25
§
C.
Note 3:
Typicals are at 25
§
C and represent most likely parametric norm.
Note 4:
Guaranteed and 100% production tested.
Note 5:
Guaranteed (but not 100% production tested) over the operating temperature. These limits are not used to calculate outgoing quality levels.
Note 6:
Settling time for gain change is the switching time for gain change plus settling time (see section on Settling Time).
Note 7:
WR minimum high threshold voltage increases to 2.4V under the extreme conditions when all three digital inputs are simultaneously taken from 0V to 5V at
a slew rate of greater than 500V/
m
S.
GAIN TABLE
Digital Input
Gain
LF13006
LF13007
DIG in 3
DIG in 2
DIG in 1
A
OUT
1
2
4
8
16
32
64
128
B
OUT
1
1.25
2.5
5
10
20
40
80
A
OUT
1
1.25
2
5
10
20
50
100
B
OUT
1
1
1.6
4
8
16
40
80
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
Connection Diagram
Dual-In-Line Package
TL/H/5114–2
2
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相關代理商/技術參數 |
參數描述 |
|---|---|
| LF13006D/A+ | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:DIGITAL GAIN SET|BIPOLAR|DIP|16PIN|CERAMIC |
| LF13006N/A+ | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:DIGITAL GAIN SET|BIPOLAR|DIP|16PIN|PLASTIC |
| LF13006N/B+ | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:DIGITAL GAIN SET|BIPOLAR|DIP|16PIN|PLASTIC |
| LF13007 | 制造商:Texas Instruments 功能描述: |
| LF13007D/A+ | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:DIGITAL GAIN SET|BIPOLAR|DIP|16PIN|CERAMIC |
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