參數(shù)資料
型號: LDS89001008-T2
廠商: IXYS CORP
元件分類: 穩(wěn)壓器
英文描述: SWITCHING CONTROLLER, PDSO8
封裝: 3 X 2 MM, ROHS COMPLIANT, MO-220, DFN-8
文件頁數(shù): 25/30頁
文件大?。?/td> 622K
代理商: LDS89001008-T2
LDS9003 / 9001
2009 IXYS Corp.
4
Doc. No. 9003/9001_DS, Rev. N1.0
Characteristics subject to change without notice
I
2C CHARACTERISTICS
Over recommended operating conditions unless otherwise specified for 2.5
VIN 5.5V, over full ambient temperature range -40 to +85C.
Symbol
Parameter
Min
Max
Unit
fSCL
SCL Clock Frequency
0
400
kHz
tHD:STA
Hold Time (repeated) START condition
0.6
s
tLOW
LOW period of the SCL clock
1.3
s
tHIGH
HIGH period of the SCL clock
0.6
s
tSU:STA
Set-up Time for a repeated START condition
0.6
s
tHD:DAT
Data In Hold Time
0
0.9
ns
tSU:DAT
Data In Set-up Time
100
ns
tR
Rise Time of both SDAT and SCLK signals
300
ns
tF
Fall Time of both SDAT and SCLK signals
300
ns
tSU:STO
Set-up Time for STOP condition
0.6
s
tBUF
Bus Free Time between a STOP and START condition
1.3
s
tAA
SCLK Low to SDAT Data Out and ACK Out
0.9
s
tDH
Data Out Hold Time
300
ns
Figure 1: I
2C Bus Timing Diagram
READ OPERATION:
Option 1: Standard protocol sequential read:
S
Slave Address
R
A
Data 0
A
Data 1
A
Data 2
Data n
A*
P
From: Reg. m
Reg. m+1
Reg. m+2
Reg. m+n,
where Reg. m is the last addressed in the write operation register
Option 2: Random access:
S
Slave Address
R
A
Data m
A*
P
From reg. m, where Reg. m is the last addressed in the write operation register
Option 3: Random access with combined (extended) protocol:
S
Slave Address
W
A
Register Address m
A
Sr
Slave Address
R
A
Data m
A*
P
WRITE OPERATION:
Option 1: Standard protocol sequencial write:
S
Slave Address
W
A
Register Address m
A
Data 0
A
Data 1
A
Data 2
Data k
A*
P
To: Reg. m
Reg. m+1
Reg. m+2
Reg. m+k
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