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參數(shù)資料
| 型號(hào)： | LC895926 |
| 廠商： | Sanyo Electric Co.,Ltd. |
| 英文描述： | CD-R Encoder/Decoder IC with Built-in SCSI Interface |
| 中文描述： | CD - R光盤(pán)編碼器/解碼器集成電路內(nèi)置SCSI接口 |
| 文件頁(yè)數(shù)： | 4/7頁(yè) |
| 文件大?。?/td> | 68K |
| 代理商： | LC895926 |
Pin Descriptions
No. 5829-4/7
LC895926
Type: I: Input pin, O: Output pin, B: Bidirectional pin, P: Power supply pin, N: No connection pin
Pin Number
Pin Name
Type
Description
1
V
SS
P
2
XTALCK0
I
Xtal oscillator circuit input pin (17.2872 MHz)
3
XTAL0
O
Xtal oscillator circuit output pin
4
TEST0
I
Test pin (connect to V
SS
)
Reset pin
5
RESET
I
6
V
DD
P
5V
7
SUBSYNC
O
Subcode synchronization signal output pin
8
EFMG
O
EFM output gate signal output pin
9
EFM
O
EFM signal output pin
10
EFMGATE0
O
11
EFMGATE1
O
EFM pulse width detection gate signals
12
EFMGATE2
O
13
EFMGATE3
O
14
TEST1
I
Test pin (connect to V
SS
)
15
Reserve0
B
16
Reserve1
B
17
Reserve2
B
Reserved for future expansion (connect to V
SS
if unused.)
18
Reserve3
B
19
Reserve4
B
20
V
DD
V
SS
P
3.3V
21
P
22
Reserve5
B
23
Reserve6
B
Reserved for future expansion (connect to V
SS
if unused.)
24
Reserve7
B
25
TEST2
I
Test pin (connect to V
SS
)
CD decoder lock signal input pin
26
LOCKIN
I
27
LOCK
O
CLV servo lock monitor pin
28
PLLOUTIN
I
Wobble signal carrier clock input pin
29
V
SS
P
30
ROUGH
I
Rough CLV servo wobble signal input pin
31
ATIPSYNC
B
ATIP synchronization signal I/O pin
32
BICLKIN
I
Biphase data transfer clock input pin
33
BIDATAI
I
Biphase data input pin
34
V
DD
V
SS
P
3.3V
35
P
36
CLV
+
(MDP)
CLV
–
(MDS)
O
37
O
CLV servo signal output pin
38
MON
O
39
FSW
O
40
V
DD
V
SS
P
5V
41
P
Continued on next page.
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