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參數(shù)資料
| 型號(hào)： | LC895299L |
| 元件分類： | 消費(fèi)家電 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP176 |
| 封裝： | LQFP-176 |
| 文件頁(yè)數(shù)： | 7/12頁(yè) |
| 文件大?。?/td> | 194K |
| 代理商： | LC895299L |
No. 6249-4/12
LC895299W, 895299L
Block Diagram
Sub-code
SYNC
Detector
De-scramble
&
Buffering
Address generator
Micro controller
RAM access
Address generator
ECC & EDC
I/F
ATAPI
Address generator
Data output input I/F
Address generator
CAV-AUDIO
Bus Arbiter
&
DRAM
controller
Buffer
DRAM
Each Block
Bus control
signal
Each Block
Register
CD-DSP I/F
&
SYNC
Detector
SRAM
CD-DSP
LA9238
HOST
Audio
Circuit
VCEC
PLL
Driver
FG
TDO, FDO
SLDO, SPDO
Micro
controller
decoder
PLL Clock
generator
*11
*1
*12
*2
*14
*3
*4
*5
*6
*7
*8
WRQ
ZSWAIT
ZINT 1
ZINT 0
ZRESET
ZDSPRST
*13
*9
*10
XTALCK
XTAL
Each Block
Data bus[0:7]
Address bus[0:18]
DRAM
Data bus[0:15]
A12530
*
1
EFMIN, EFMIN2, PH, BH, FE, TE, TES, RREC
*
2
RHLD, TSH, EQS, BHH, GHS, LDON, FBAL, TBAL, TOFST, SGC
*
3
LOUT, ROUT, DOUT
*
4
DD0 to DD15, ZDASP, ZPDIAG
*
5
ZCS1FX, ZCS3FX, DA0 to DA2, ZDIOR, ZDIOW, ZDMACK, ZHRST, CSEL
*
6
DMARQ, HINTRQ, ZIOCS16, IORDY
*
7
ZRD, ZWR, ZCS, CSCTRL, SUA0 to SUA7
*
8
D0 to D7
*
9
DIR/FLOCK, HFLO/TLOCK, FSEQ, FSX/LRCK, EFLG/CK2, C2F, EFMOUT, PCK, TRV2/DATA, TRV, PORT OUT0 to OUT2
*
10 ATPINSEL, TEST0 to TEST2
*
11 RPO, OPP, PCKISTF, PCKISTP, PDO, POS1 to POS3, FR
*
12 SLCO0 to SLCO3, JITC, DSLB, PHC, BHC
*
13 PLL1 to PLL3
*
14 SLCIT1 to SLCIT2, JITIN, AD0 to AD2, VREF, CSS
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