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參數(shù)資料
| 型號(hào)： | LC86A |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | QUADRUPLE 2-INPUT EXCLUSIVE-OR GATES |
| 中文描述： | 四2輸入異或門 |
| 文件頁(yè)數(shù)： | 3/17頁(yè) |
| 文件大?。?/td> | 506K |
| 代理商： | LC86A |
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www.ti.com
Absolute Maximum Ratings
(1)
over operating free-air temperature range (unless otherwise noted)
Recommended Operating Conditions
(1)
SN54LVC86A, SN74LVC86A
QUADRUPLE 2-INPUT EXCLUSIVE-OR GATES
SCAS288P–JANUARY 1993–REVISED APRIL 2005
MIN
–0.5
–0.5
–0.5
MAX
6.5
6.5
UNIT
V
V
V
mA
mA
mA
mA
V
CC
V
I
V
O
I
IK
I
OK
I
O
Supply voltage range
Input voltage range
(2)
Output voltage range
(2)(3)
Input clamp current
Output clamp current
Continuous output current
Continuous current through V
CC
or GND
V
CC
+ 0.5
V
I
< 0
V
O
< 0
–50
–50
±
50
±
100
D package
(4)
DB package
(4)
NS package
(4)
PW package
(4)
RGY package
(4)
86
96
76
θ
JA
Package thermal impedance
°
C/W
113
47
150
500
T
stg
P
tot
Storage temperature range
Power dissipation
–65
°
C
mW
T
A
= –40
°
C to 125
°
C
(5)(6)
(1)
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
The input negative-voltage and output voltage ratings may be exceeded if the input and output current ratings are observed.
The value of V
is provided in the recommended operating conditions table.
The package thermal impedance is calculated in accordance with JESD 51-7.
For the D package: above 70
°
C, the value of P
derates linearly with 8 mW/K.
For the DB, DGV, NS, and PW packages: above 60
°
C, the value of P
tot
derates linearly with 5.5 mW/K.
(2)
(3)
(4)
(5)
(6)
SN54LVC86A
–55 TO 125
°
C
MIN
2
1.5
2
UNIT
MAX
3.6
Operating
Data retention only
V
CC
= 2.7 V to 3.6 V
V
CC
= 2.7 V to 3.6 V
V
CC
Supply voltage
V
V
IH
V
IL
V
I
V
O
High-level input voltage
Low-level input voltage
Input voltage
Output voltage
V
V
V
V
0.8
5.5
V
CC
–12
–24
12
24
0
0
V
CC
= 2.7 V
V
CC
= 3 V
V
CC
= 2.7 V
V
CC
= 3 V
I
OH
High-level output current
mA
I
OL
Low-level output current
mA
t/
v
Input transition rise or fall rate
9
ns/V
(1)
All unused inputs of the device must be held at V
or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs
, literature number SCBA004.
3
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