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LC868364A
12/29
Name
No.
102-95
I/O
I/O
Function Description
Option
Port5
P50 to P57
8-bit input/output port
Data direction programmable for each bit individually
Pull-up resistor:
provided/not provided
Output form:
CMOS/N-ch open drain
(Note 1)
4-bit input port
Other functions
P70
P71
P72
P73
INT0 input/HOLD release/N-ch Tr.
output for watchdog timer
INT1 input/HOLD release input
INT2 input/Timer 0 event input
INT3 input with noise filter/Timer 0
event input
Interrupt detection style, vector address
Rising Falling Falling H level L level Vector
INT0
INT1
INT2
INT3
Yes
Yes
Yes
LCD output terminals for common
Pull-up resistor:
provided/not provided
Port7
P70 to P73
83-86
I
Yes
Yes
Yes
Yes
Yes
Yes
No
No
Yes
Yes
Yes
No
No
Yes
Yes
No
No
03H
0BH
13H
1BH
C1 to C32
(Note 3)
S1 to S32
RES
ADLC
EROE
XT1
73-42
O
Segment output/
common output
-
-
-
-
-
10-41
130
128
129
131
O
I
O
O
I
LCD output terminals for segment
Reset
Address control signal for external memory
Enable signal of external ROM output
Input terminal for 32.768kHz Xtal
When not in use, connect to VDD.
Output terminal for 32.768kHz Xtal
When not in use, leave open circuit.
Input terminal for ceramic resonator
When not in use, connect to VDD.
Output terminal for ceramic resonator
When not in use, leave open circuit.
Input terminal for RC oscillation (when external RC
oscillation is used)
Put a resistor between RC1 and RC2, and a capacitor
between RC1 and VSS externally.
Leave open when internal RC oscillation is used.
Output terminal for RC oscillation (when external RC
oscillation is used)
Put a resistor between RC1 and RC2 externally.
Leave open when internal RC oscillation is used.
XT2
132
O
-
CF1
134
I
-
CF2
135
O
-
RC1
3
I
Internal/external
RC2
2
O
Internal/external
(Note 1) Nch-OD: N-channel open-drain output
(Note 2) P30INT: Bit 0 of Port 3 interrupt control register (P3INT).
* Port options can be specified for each bit individually.
(Note 3) C1-C32 are the terminal names when 1/32 duty is selected.
C1-C16 and S48-S33 are the terminal names when 1/16 duty is selected.
Refer to “Pad Assignment” in pages 5-6.
* A state of port at initial
Pin Name
Port 0, 7
Ports 1, 2
Ports 3, 5
Port 4
Input/output Mode
Input
Input
Style of pull-up resistors when pull-up option is enabled
Fixed pull-up resistor provided
Programmable pull-up resistor OFF
Input
Programmable pull-up resistor ON
Name
C1 to C32
S1 to S32
Output Level
VSS (display OFF)
VSS (display OFF)