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參數(shù)資料
| 型號(hào)： | LC865404 |
| 廠商： | Sanyo Electric Co.,Ltd. |
| 元件分類： | 8位微控制器 |
| 英文描述： | 8-Bit Single Chip Microcontroller |
| 中文描述： | 8位單片機(jī)微控制器 |
| 文件頁數(shù)： | 11/21頁 |
| 文件大?。?/td> | 74K |
| 代理商： | LC865404 |
LC86E5420
No.6805-11/21
2. Recommended Operating Range
at VSS=0V and Ta=+10
°
C to +40
°
C
Parameter
Symbol
Pins
Conditions
Ratings
typ.
VDD [V]
min.
4.5
max.
6.0
unit
Operating
supply
voltage range
HOLD voltage
VDD
VDD
0.98
μ
s
≤
tCYC
tCYC
≤
400
μ
s
V
VHD
VDD
RAMs and
Registers hold
voltage at HOLD
mode.
Output disable
2.0
6.0
Input high
voltage
VIH(1)
Port 0 at CMOS
output
Port 0 at N-ch
open drain output
option.
Port 1
Ports 72, 73
Port 3 at CMOS
output
Port 3 at N-ch
open drain output
option.
Port 70
Port input /
interrupt
Port 71
RES
Port 70
Watchdog timer
Port 8
Ports 74, 75
Port 0 at CMOS
output option
Port 0 at N-ch
open drain output
option.
Ports 1, 3
Ports 72, 73
Port 70
Port input /
interrupt
Port 71
RES
Port 70
Watchdog timer
Port 8
Ports 74, 75
4.5 to 6.0 0.33VDD
VDD
+1.0
VIH(2)
Output disable
4.0 to 6.0 0.75VDD
13.5
VIH(3)
Output disable
4.5 to 6.0 0.75VDD
VDD
VIH(4)
Output disable
4.5 to 6.0 0.75VDD
13.5
VIH(5)
Output disable
4.5 to 6.0 0.75VDD
VDD
VIH(6)
Output disable
4.5 to 6.0 0.9VDD
VDD
VIH(7)
Output disable
Using as port
Output disable
4.5 to 6.0 0.75VDD
VDD
Input low
voltage
VIL(1)
4.5 to 6.0
VSS
0.2VDD
VIL(2)
Output disable
4.5 to 6.0
VSS
0.25VDD
VIL(3)
Output disable
4.5 to 6.0
VSS
0.25VDD
VIL(4)
Output disable
4.5 to 6.0
VSS
0.25VDD
VIL(5)
Output disable
4.5 to 6.0
VSS
0.8VDD
--1.0
0.25VDD
VIL(6)
Output disable
Using as port
4.5 to 6.0
VSS
Operation
cycle time
tCYC
4.5 to 6.0
0.98
400
μ
s
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