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參數(shù)資料
| 型號(hào)： | LC863516B |
| 廠商： | Sanyo Electric Co.,Ltd. |
| 英文描述： | 8-bit 1-chip Microcontroller |
| 中文描述： | 8位1片上微控制器 |
| 文件頁(yè)數(shù)： | 11/17頁(yè) |
| 文件大小： | 527K |
| 代理商： | LC863516B |
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LC863548B/40B/32B/28B/24B/20B/16B
No.7936-11/17
IIC Input/Output Conditions
/ Ta = -10°C to +70°C, VSS = 0V
Standard
High speed
Parameter
Symbol
min
max
min
max
unit
SCL Frequency
fSCL
0
100
0
400
kHz
BUS free time between stop to start
tBUF
4.7
-
1.3
-
μ
s
HOLD time of start, restart condition
tHD ; STA
4.0
-
0.6
-
μ
s
L time of SCL
tLOW
4.7
-
1.3
-
μ
s
H time of SCL
tHIGH
4.0
-
0.6
-
μ
s
Set-up time of restart condition
tSU ; STA
4.7
-
0.6
-
μ
s
HOLD time of SDA
tHD ; DAT
0
-
0
0.9
μ
s
Set-up time of SDA
tSU ; DAT
250
-
100
-
ns
Rising time of SDA, SCL
tR
-
1000
20 + 0.1Cb
300
ns
Falling time of SDA, SCL
tF
-
300
20 + 0.1Cb
300
ns
Set-up time of stop condition
Refer to figure 7
Note : Cb : Total capacitance of all BUS (unit : pF)
Pulse Input Conditions
/ Ta = -10°C to +70°C, VSS = 0V
tSU ; STO
4.0
-
0.6
-
μ
s
Limits
Parameter
Symbol
Pins
Conditions
VDD[V]
min
typ
max
unit
tPIH(1)
tPIL(1)
INT0, INT1
INT2/T0IN
Interrupt acceptable
Timer 0-countable
4.5 to 5.5
1
tPIH(2)
tPIL(2)
INT3/T0IN
(1 tCYC is selected for
noise rejection clock.)
Interrupt acceptable
Timer 0-countable
4.5 to 5.5
2
tPIH(3)
tPIL(3)
INT3/T0IN
(16 tCYC is selected for
noise rejection clock.)
Interrupt acceptable
Timer 0-countable
4.5 to 5.5
32
tPIH(4)
tPIL(4)
INT3/T0IN
(64 tCYC is selected for
noise rejection clock.)
Interrupt acceptable
Timer 0-countable
4.5 to 5.5
128
tCYC
tPIL(5)
RES
Reset acceptable
4.5 to 5.5
200
High/low level pulse
width
tPIH(6)
tPIL(6)
HS, VS
Display position
controllable (Note)
The active edge of HS
and VS must be apart
at least 1 tCYC.
Refer to figure 4.
4.5 to 5.5
3
μ
s
Rising/falling time
tTHL
tTLH
HS
Refer to figure 4.
4.5 to 5.5
500
ns
AD Converter Characteristics
/ Ta = -10°C to +70°C, VSS = 0V
Limits
Parameter
Symbol
Pins
Conditions
VDD [V]
min
typ
max
unit
Resolution
N
6
bit
Absolute precision
ET
(Note)
±1
LSB
Conversion time
tCAD
Vref selection
to conversion
finish
1-bit conversion time = 2 × tCYC
1.69
μ
s
Analog input
voltage range
VAIN
VSS
VDD
V
IAINH
VAIN = VDD
VAIN = VSS
1
Analog port
input current
IAINL
AN4 to AN7
4.5 to 5.5
-1
μ
A
Note : Absolute precision does not include quantizing error (1/2LSB).
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