參數(shù)資料
型號： LC79400D
廠商： Sanyo Electric Co.,Ltd.
英文描述： Dot Matrix LCD Driver
中文描述： 點陣LCD驅動器
文件頁數(shù)： 2/8頁
文件大?。?/td> 180K
代理商： LC79400D
LC79400D
No. 4346-2/8
Allowable Operating Ranges
at Ta = –20 to +75°C, V
SS
= 0 V
Note:2. The voltages V
1
, V
3
, V
4
, V
7
, V
DD
and V
EE
must obey the relationships: V
DD
≥
V1 > V3 > V4 > V
EE
, V
DD
– V3
≤
7V, V4 – V
EE
≤
7V.
3. When applying
power,
apply
power to the LCD drive block after applying power to the logic block or apply power to both the blocks
simultaneously. When turning off power, turn off power to the logic block after turning off power to the LCD drive block or turn
off power to both the blocks simultaneously.
Electrical Characteristics
at Ta = 25±2°C, V
SS
= 0 V, V
DD
= 5 V±10%
Note:4. V
DE
= V1 or V3 or V4 or V
EE
, V1 = V
DD
, V3 = 15/17 (V
DD
-V
EE
), V4 = 2/17 (V
DD
-V
EE
)
5. I
SS
current flows from V
DD
to V
SS
.
6. I
EE
current flows from V
DD
to V
EE
.
Switching Characteristics
at Ta = 25±2°C, V
SS
= 0 V, V
DD
= 5 V±10%
Parameter
Symbol
Conditions
min
typ
max
Unit
Supply voltage (logic)
V
DD
4.5
5.5
V
Supply voltage (LCD)
V
DD
- V
EE
*
2
,
*
3
12
32
V
Input high-level voltage
V
IH
DI1 to 4, CP, LOAD, CDR, CDL
R/L, M, DISP OFF
0.8 V
DD
V
Input low-level voltage
V
IL
DI1 to 4, CP, LOAD, CDR, CDL
R/L, M, DISP OFF
0.2 V
DD
V
CP (shift clock)
f
CP
f
WC
t
WL
t
SETUP
t
HOLD
t
CL
1
t
CL
2
t
LC
t
R
t
F
t
RL
t
FL
CP
3.0
MHz
CP (pulse width)
CP
100
ns
LOAD pulse width
LOAD
DI1 to 4
→
CP
DI1 to 4
→
CP
CP
→
LOAD
CP
→
LOAD
LOAD
→
CP
CP
100
ns
Setup time
80
ns
Hold time
80
ns
CP
→
LOAD
0
ns
100
ns
LOAD
→
CP
63
ns
50
ns
Rise/Fall time
CP
50
ns
LOAD
50
ns
LOAD
50
ns
Parameter
Symbol
Conditions
min
typ
max
Unit
Input high-level current
I
IH
V
IN
= V
DD
; LOAD, CP, CDR (CDL),
R/L, DI1 to DI4, M, DISP OFF
1
μA
Input low-level current
I
IL
V
IN
= V
SS
; LOAD, CP, CDR (CDL),
R/L, DI1 to DI4, M, DISP OFF
–1
μA
Output high-level voltage
V
OH
V
OL
I
OH
= –400 μA; CDL (CDR)
I
OL
= 400 μA; CDL (CDR)
V
DD
– V
EE
= 30 V,
V
DE
– V
O
= 0.5 V
*
4
;
O1 to O80
V
DD
– V
EE
= 20 V,
V
DE
– V
O
= 0.5 V
*
4
;
O1 to O80
V
DD
– 0.4
V
Output low-level voltage
0.4
V
R
ON
1
1.5
3.0
k
Driver on resistor
R
ON
2
2.0
3.5
k
Standby current dissipation
I
ST
CDR (CDL) = V
DD
, V
DD
– V
EE
= 30 V
CP = 3.0 MHz, no-load output: V
SS
V
DD
– V
EE
= 30 V, CP = 3 MHz,
LOAD = 14 kHz, M = 35 Hz; V
SS
V
DD
– V
EE
= 30 V, CP = 3 MHz,
LOAD = 14 kHz, M = 35 Hz; V
EE
f = 3.0 MHz; CP
200
μA
I
SS
*
5
4.0
mA
Operation current dissipation
I
SS
*
6
0.1
mA
Input capacity
C
I
5
pF
Parameter
Symbol
Conditions
min
typ
max
Unit
Output delay time
t
D
Load = 15 pF; CDR (CDL)
200
ns
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