參數(shù)資料
型號(hào): LC78816
廠商: Sanyo Electric Co.,Ltd.
英文描述: 16-Bit D/A Converter for Use in Digital Audio Products
中文描述: 16位的D / A在數(shù)字音頻產(chǎn)品的轉(zhuǎn)換器使用
文件頁數(shù): 11/11頁
文件大?。?/td> 276K
代理商: LC78816
No. 4250-11/11
LC78816MB, 78816MC
Sample Application Circuit
This catalog provides information as of December, 1997. Specifications and information herein are subject to
change without notice.
I
No products described or contained herein are intended for use in surgical implants, life-support systems, aerospace
equipment, nuclear power control systems, vehicles, disaster/crime-prevention equipment and the like, the failure of
which may directly or indirectly cause injury, death or property loss.
I
Anyone purchasing any products described or contained herein for an above-mentioned use shall:
Accept full responsibility and indemnify and defend SANYO ELECTRIC CO., LTD., its affiliates, subsidiaries and
distributors and all their officers and employees, jointly and severally, against any and all claims and litigation and all
damages, cost and expenses associated with such use:
Not impose any responsibility for any fault or negligence which may be cited in any such claim or litigation on
SANYO ELECTRIC CO., LTD., its affiliates, subsidiaries and distributors or any of their officers and employees
jointly or severally.
I
Information (including circuit diagrams and circuit parameters) herein is for example only; it is not guaranteed for
volume production. SANYO believes information herein is accurate and reliable, but no guarantees are made or implied
regarding its use or any infringements of intellectual property rights or other rights of third parties.
Notes: 1. DV
DD
and DGND must be connected to the digital system power supply, and AV
DD
and AGND to the analog system power supply.
2. Use a low impedance high stability power supply (a unit equivalent to a commercial three terminal regulator) for V
DD
and VrefH.
3. Since latchup is possible if there is a discrepancy between the power supply rise times for pin 4 (AV
DD
) and pin 10 (DV
DD
), design the system so
that there is no time lag between the pin 4 and pin 10 power application times.
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