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參數(shù)資料
| 型號： | LC78632 |
| 廠商： | Sanyo Electric Co.,Ltd. |
| 元件分類： | 數(shù)字信號處理 |
| 英文描述： | 16-bit fixed point DSP with Flash |
| 中文描述： | 具有閃存的 16 位定點(diǎn) DSP |
| 文件頁數(shù)： | 4/9頁 |
| 文件大小： | 157K |
| 代理商： | LC78632 |
Continued from preceding page.
Note: Due to the structure of this IC, the identical voltage must be applied to all power-supply pins.
Electrical Characteristics
at Ta = 25°C, V
DD
= 5 V, V
SS
= 0 V
No. 5826-4/9
LC78632RE
Parameter
Symbol
Conditions
min
typ
max
Unit
High-level clock pulse width
t
WH
t
WL
t
RAC
t
RWC
t
SQE
t
SC
t
SE
t
PD
V
EI
V
XI
SBCK, CQCK: Figures 1, 2, 3, and 4
400
ns
Low-level clock pulse width
SBCK, CQCK: Figures 1, 2, 3, and 4
400
ns
Data read access time
SQOUT, PW: Figures 2, 3, and 4
0
400
ns
Command transfer time
RWC: Figures 1 and 4
1000
ns
Subcode Q read enable time
WRQ: Figure 2, with no RWC signal
11.2
ms
Subcode read cycle
SFSY: Figure 3
136
μs
Subcode read enable
SFSY: Figure 3
400
ns
Port output delay time
CONT1, CONT2, P0 to P5: Figure 5
1200
ns
Input level
EFMI
1.0
Vp-p
X
IN
: Capacitance coupled input
1.0
Vp-p
Parameter
Symbol
Conditions
min
typ
max
Unit
Current drain
I
DD
Normal-speed playback
30
mA
I
IH
1
EFMI, HFL, TES, SBCK, RWC, COIN, CQCK, RES,
DEFI: V
IN
= 5 V
TAI, TEST1 to TEST5, CS: V
IN
= 5 V
TAI, EFMI, HFL, TES, SBCK, RWC, COIN, CQCK, RES,
TEST1 to TEST5, CS, DEFI: V
IN
= 0 V
EFMO, CLV
+
, CLV
–
, V/P, PCK, FSEQ, TOFF, TGL,
THLD, JP
+
, JP
–
, EMPH, EFLG, FSX
I
OH
= –1 mA
MUTEL, MUTER, LRCKO, DFLRO, DACKO, P0/DFCK,
P1/DFIN, P2, P3/DFLR, P4, P5, LRSY, CK2, ROMXA,
C2F, SBSY, PW, SFSY, WRQ, SQOUT, 16M, 4.2M,
CONT1, CONT2: I
OH
= –0.5 mA
VPDO: I
OH
= –1 mA
DOUT: I
OH
= –12 mA
LCHP, RCHP, LCHN, RCHN: I
OH
= –1 mA
EFMO, CLV
+
, CLV
–
, V/P, PCK, FSEQ, TOFF, TGL,
THLD, JP
+
, JP
–
, EMPH, EFLG, FSX
I
OL
= 1 mA
MUTEL, MUTER, LRCKO, DFLRO, DACKO, P0/DFCK,
P1/DFIN, P2, P3/DFLR, P4, P5, LRSY, CK2, ROMXA,
C2F, SBSY, PW, SFSY, WRQ, SQOUT, 16M, 4.2M,
CONT1, CONT2: I
OL
= 2 mA
VPDO: I
OL
= 1 mA
DOUT: I
OL
= 12 mA
LCHP, RCHP, LCHN, RCHN: I
OL
= 1 mA
PDO1, PDO2, VPDO, P0/DFCK, P1/DFIN,
P2, P3/DFLR, P4, P5: V
OUT
= 5 V
PDO1, PDO2, VPDO, P0/DFCK, P1/DFIN,
P2, P3/DFLR, P4, P5: V
OUT
= 0 V
PDO1, PDO2: R
ISET
= 68 k
PDO1, PDO2: R
ISET
= 68 k
5
μA
Input high-level current
I
IH
2
25
75
μA
Input low-level current
I
IL
–5
μA
V
OH
1
4
V
V
OH
2
4
V
Output high-level voltage
V
OH
3
V
OH
4
V
OH
5
4.5
V
4.5
V
3.0
4.5
V
V
OL
1
1
V
V
OL
2
0.4
V
Output low-level voltage
V
OL
3
V
OL
4
V
OL
5
0.5
V
0.5
V
0.5
2.0
V
I
OFF
1
5
μA
Output off leakage current
I
OFF
2
–5
μA
Charge pump output current
I
PDOH
I
PDOL
V
SLD
1
V
SLD
2
V
SLD
3
V
SLD
4
–96
–80
–64
μA
64
80
96
μA
1.0
1.25
1.5
V
Sled output voltage
2.25
2.5
2.75
V
3.5
3.75
4.0
V
4.75
V
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