參數(shù)資料
型號: LC78631
廠商: Sanyo Electric Co.,Ltd.
元件分類: 數(shù)字信號處理
英文描述: 16-bit fixed point DSP with Flash
中文描述: 具有閃存的 16 位定點(diǎn) DSP
文件頁數(shù): 18/34頁
文件大?。?/td> 503K
代理商: LC78631
No. 5342-18/34
LC78631E
Note: 1. During a track check operation the TOFF pin goes high and the tracking loop is turned off. Therefore, feed motor forwarding is required.
2. When a track check in/out command is issued the function of the WRQ signal switches from the normal mode subcode Q standby monitor
function to the track check monitor function. This signal goes high when the track count is half completed, and goes low when the count
finishes. The control microprocessor should monitor this signal for a low level to determine when the track check completes.
3. If a track check clear command ($FF) is not issued, the track check operation will repeat. This can be used. For example, to skip over
20,000 tracks, issue a track check 199 code once, and then count the WRQ signal 100 times. This will count 20,000 tracks.
4. After performing a track check operation, use the TJ brake command to lock the pickup onto the track.
7. Sled output; Pin 30: SLD
+
, pin 31: SLD
The SLED
+
and SLED
outputs can be set independently to one of four levels using this 2-byte command. Neither
SLED
+
nor SLED
are output after a reset.
SLED
+
and SLED
output is selected by the most significant bit in the data byte. The SLED output level is set by the
lower 3 bits. When SLED
+
is set, SLED
is automatically set to V
SS
(SLED off). The inverse is also true.
8. Error flag output; Pin 61: EFLG, pin 66: FSX
DATA BYTE + $B8
SLED OUTPUT SETTING
Code
Command
RES = low
$B8
SLED SET
d7
Output pin
0
SLED
+
1
SLED
d2
d1
d0
Output level
0
0
0
V
SS
(SLED off)
0.25 V
DD
0.5 V
DD
0.75 V
DD
V
DD
0
0
1
0
1
0
0
1
1
1
0
0
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