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參數(shù)資料
| 型號： | LC7851E |
| 廠商： | Sanyo Electric Co.,Ltd. |
| 英文描述： | QPSK Demodulation and Audio Signal-Processing IC for Satellite Broadcast Reception |
| 中文描述： | QPSK解調(diào)器和音頻信號處理集成電路衛(wèi)星廣播接收 |
| 文件頁數(shù)： | 4/9頁 |
| 文件大?。?/td> | 166K |
| 代理商： | LC7851E |
No. 5691-4/9
LC7851E
Continued from preceding page.
Pin No.
Pin
I/O
Function
22
VV
SS
VV
DD
(N.C)
I
Internal VCO ground
23
I
Internal VCO power supply
24
25
PV
DD
PHCNT
I
Phase comparator power supply
26
O
Phase comparator output
27
PV
SS
(N.C)
I
Phase comparator ground
28
29
V
DD
XI1
I
Oscillator circuit power supply
30
I
Crystal oscillator (22.909088 MHz) input
31
XO1
O
Crystal oscillator (22.909088 MHz) output
32
V
SS
DV
SS
DADO
I
Oscillator circuit ground
33
I
Digital system ground
34
O
Digital audio interface output
35
(N.C)
36
(N.C)
37
(N.C)
38
(N.C)
39
(N.C)
40
TEST1
I
Test pin
41
TEST2
I
Test pin
42
DV
DD
CV
SS
AOUTL
I
Digital system power supply
43
I
Internal D/A converter ground
44
O
Left channel audio data output
45
REFL
O
Internal D/A converter reference voltage: low
46
REFH
O
Internal D/A converter reference voltage: high
47
AOUTR
O
Right channel audio data output
48
CV
DD
RST
I
Internal D/A converter power supply
49
I
Reset input
50
MUTI
I
Forced muting input
51
MUTO
O
Mute detection output (When muting detected: high)
52
MOD
O
Audio mode detection output (A mode: low, B mode: high)
53
LOIN
O
Frame synchronization detection output (When synchronized: low)
54
ERR
O
Error detection output (Error detected: high)
55
REQ
O
Host CPU readout request signal
56
SDA
I/O
I
2
C bus data I/O
57
SCL
I
I
2
C bus clock input
58
DV
SS
DSTRI2
I
Digital system ground
59
I
Data stream input 2/general-purpose I/O port
60
DSTRI1
I
Data stream input 1/general-purpose I/O port
61
DSTRO
O
Data stream output (post-error correction data)
62
DASL
I
Descrambler interface switching
63
FRM
O
Frame synchronization signal
64
CK2M
O
Bit stream clock (2.048 MHz)
Caution: All NC pins must be left open.
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