參數(shù)資料
型號: LC75884W
廠商: Sanyo Electric Co.,Ltd.
英文描述: 1/4 Duty LCD Display Drivers with Key Input Function
中文描述: 1 / 4占空比LCD顯示驅(qū)動器,主要輸入功能
文件頁數(shù): 7/27頁
文件大?。?/td> 611K
代理商: LC75884W
No. 6086-7/27
LC75884E, LC75884W
Pin
Pin No.
Function
Active
I/O
Handling
when unused
LC75884E
LC75884W
S1/P1
S2/P2
S3/P3
S4/P4
S5 to S53
1
2
3
4
79
80
1
2
G
G
OPEN
5 to 53
3 to 51
COM1
COM2
COM3
COM4
54
55
56
57
52
53
54
55
G
G
OPEN
KS1/S54
KS2/S55
KS3 to KS6
58
59
56
57
O
OPEN
60 to 63
58 to 61
KI1 to KI5
64 to 68
62 to 66
H
I
GND
OSC
75
73
I/O
V
DD
CE
78
76
H
I
CL
79
77
I
GND
DI
80
78
I
DO
77
75
O
OPEN
RES
76
74
L
I
V
DD
TEST
74
72
This pin must be connected to ground.
I
V
LCD
1
71
69
I
OPEN
V
LCD
2
72
70
I
OPEN
V
DD
69
67
V
LCD
70
68
V
SS
73
71
Power supply connection. Connect to ground.
Pin Functions
Segment outputs for displaying the display data transferred by serial
data input.
The S1/P1 to S4/P4 pins can be used as general-purpose output ports
under serial data control.
Common driver outputs
The frame frequency fo is given by : fo = (f
OSC
/512)Hz.
Key scan outputs
Although normal key scan timing lines require diodes to be inserted in
the timing lines to prevent shorts, since these outputs are unbalanced
CMOS transistor outputs, these outputs will not be damaged by shorting
when these outputs are used to form a key matrix. The KS1/S54 and
KS2/S55 pins can be used as segment outputs when so specified by
the control data.
Key scan inputs
These pins have built-in pull-down resistors.
Oscillator connection
An oscillator circuit is formed by connecting an external resistor and
capacitor at this pin.
Serial data interface connections to the controller. Note that DO, being
an open-drain output, requires a pull-up resistor.
CE :Chip enable
CL :Synchronization clock
DI :Transfer data
DO :Output data
L
Reset signal input
RES=low Display off
Key scan disabled
All key data is reset to low
RES=high Display on
Key scan enabled
However, serial data can be transferred when RES is low.
Used for applying the LCD drive 2/3 bias voltage externally. Must be
connected to VLCD2 when a 1/2 bias drive scheme is used.
Used for applying the LCD drive 1/3 bias voltage externally. Must be
connected to VLCD1 when a 1/2 bias drive scheme is used.
Logic block power supply connection. Provide a voltage of between 4.5
and 6.0V.
LCD driver block power supply connection. Provide a voltage of
between VDD–0.5 and 6.0V.
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