參數(shù)資料
型號(hào): LC75814V
廠商: Sanyo Electric Co.,Ltd.
英文描述: 1/4 Duty General-Purpose LCD Driver
中文描述: 1 / 4占空比通用LCD驅(qū)動(dòng)器
文件頁數(shù): 5/14頁
文件大?。?/td> 101K
代理商: LC75814V
Pin Functions
No. 6792-5/14
LC75814V
CE:
CL:
DI:
Chip enable
Synchronization clock
Transfer data
H
S1/P1 to
S4/P4
S5 to S16
Pin
1 to 4
5 to 16
O
Open
Segment outputs for displaying the display data transferred by serial data input. The pins
S1/P1 to S4/P4 can be used as general-purpose output ports when so set up by the
control data.
COM1
COM2
COM3
COM4
17 to 20
O
Open
Common driver outputs.
The frame frequency f
O
is given by: f
O
= (f
OSC
/512) Hz.
OSC
26
CE
CL
DI
28
29
30
Serial data transfer inputs. These pins are
connected to the control microprocessor.
I/O
V
DD
I
GND
Oscillator connection
An oscillator circuit is formed by connecting an external resistor and capacitor to this pin.
V
LCD
1
23
I
Open
Used to apply the LCD drive 2/3 bias voltage externally. This pin must be connected to
V
LCD
2 when 1/2 bias drive is used.
V
LCD
2
24
I
Open
Used to apply the LCD drive 1/3 bias voltage externally. This pin must be connected to
V
LCD
1 when 1/2 bias drive is used.
V
DD
21
Logic block power supply. Provide a voltage in the range 2.7 to 6.0 V.
V
LCD
22
LCD driver block power supply. Provide a voltage in the range 2.7 to 6.0 V.
V
SS
25
Ground pin. Connect to ground.
INH
27
L
I
GND
Display off control input
INH = low (V
SS
):
Off
S1/P1 to S4/P4 = Low
(These pins are forcibly set to the segment output port function and
fixed at the V
level.)
S5 to S16 = Low (V
),
COM1 to COM4 = Low (V
SS
)
INH = high (V
): On
Note that serial data transfers can be performed when the
display is forced off by this pin.
Active
I/O
Handling
when unused
Function
Pin No.
Serial Data Transfer Format
1. When CL is stopped at the low level
Note: DD ... Direction data
1
B0
CL
CE
DI
ILC00273
1
B1
1
B2
1
B3
0
A0
0
A1
1
A2
0
A3
D1
D2 D3
D21 D22 D23 D24 D25 D26 D27 D28 D29 D30 D31 D32
0
P0 P1 P2 DR SC BU
0
CCB address
8 bits
Display data
32 bits
Control data
7 bits
DD
1 bit
1
B0
1
B1
1
B2
1
B3
0
A0
0
A1
1
A2
0
A3
D33
D34 D35
D53 D54 D55 D56 D57 D58 D59 D60 D61 D62 D63 D64
0
0
0
0
0
0
0
1
CCB address
8 bits
Display data
32 bits
Fixed data
7 bits
DD
1 bit
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