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參數(shù)資料
| 型號： | LC75742W |
| 廠商： | Sanyo Electric Co.,Ltd. |
| 英文描述： | 1/2 Duty VFD Driver with Key Input Function |
| 中文描述： | 1 / 2的責任VFD驅(qū)動器與關(guān)鍵輸入功能 |
| 文件頁數(shù)： | 5/18頁 |
| 文件大?。?/td> | 308K |
| 代理商： | LC75742W |
Block Diagram
Pin Descriptions
No. 6142-5/18
LC75742E, LC75742W
Pin No.
Pin
Function
I/O
Handling when unused
3
V
FL
V
DD
V
SS
OSCI
Driver block power supply. Applications must provide a voltage in the range 8.0 to 18.0 V.
—
—
59
Logic block power supply. Applications must provide a voltage in the range 4.5 to 5.5 V.
—
—
56
Power supply ground. This pin must be connected to the system ground.
—
—
58
I
GND
57
OSCO
O
OPEN
Reset signal input used to initialize the IC internal state. During a reset,
the display is turned off forcibly regardless of the internal display data.
Also note that the internal key data is all reset to 0 and key scan operations are disabled.
However, serial data input is possible in this state.
60
BLK
I
GND
63
CL
64
DI
I
GND
62
CE
61
DO
O
OPEN
1, 2
G1, G2
Digit outputs. The frame frequency f
O
is (f
OSC
/4096) Hz.
Segment outputs that display the display data transferred over the serial interface.
O
OPEN
44 to 4
S1 to S41
O
OPEN
Key scan outputs. Normally, when a key matrix is formed, diodes are inserted in the key
scan timing lines to prevent shorts. However, since this IC uses unbalanced CMOS outputs
in the output transistor circuit, the IC will not be damaged if these outputs are shorted.
45 to 50
KS1 to KS6
O
OPEN
51 to 55
KI1 to KI5
Key scan inputs. Pull-down resistors are built into the IC internal pin circuits.
I
GND
Serial data interface. These pins must be connected to the system microcontroller.
Note that since DO is an open-drain output, a pull-up resistor is required.
CL: Synchronization clock
CE: Chip enable
DI: Transfer data
DO: Output data
Oscillator circuit connections. An oscillator circuit is formed by connecting a resistor and a
capacitor externally to these pins.
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