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參數(shù)資料
| 型號(hào)： | LC75700T-MPB-E |
| 廠商： | ON Semiconductor |
| 文件頁(yè)數(shù)： | 4/16頁(yè) |
| 文件大小： | 0K |
| 描述： | IC KEY SCANNING LSI 20TSSOP |
| 標(biāo)準(zhǔn)包裝： | 70 |
| 系列： | * |
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System Reset
When the power is first applied, the state of function is undefined, so it must be initialized by RES = “L”
1.Reset methods
This LSI stopprts the reset methods described below.
When a system reset is applied, key scanning is disabeled, the key data is reset, and the general-purpose output ports
are set to and held at the low level (VSS).
Set RES = “H” after the RES = “L” period. And key scanning become possible by the control data are transferred.
No. 7632-12/16
LC75700T
Control data transfer
KS1 to KS3
Output pins KS4/P4 to KS6/P2
P1
RES
CE
Undefined
"L"
Defined
Notes: t1
≥ 10 s
t2
≥ 10 s
VIL
t1
VDD
VDDmin
VIL
t2
VIH1
Blocks to which the reset applies.
RES
CCB
INTERFACE
VDD
DI
KEY SCAN
KI1
KI2
KI3
KI4
KI5
KS1
KS2
KS3
KS4/P4
KS5/P3
P1
KS6/P2
KEY BUFFER
GENERAL PORT
CONTROL REGISTER
SHIFT REGISTER
CLOCK
GENERATOR
VSS
CL
CE
DO
OSC
2.Internal block states during the reset period.
CLOCK GENERATOR
Reset is applied and the basic clock is stopped. (The oscillator on the OSC pin is stopped.)
KEY SCAN, KEY BUFFER
Reset is applied, the circuit is set to the initial state, and at the same time the key scan operation is disabled.
And all the key data is set to Low. Then, when the control data are transferred, the key scanning operation is enabled.
GENERAL PORT
Reset is applied and the outputs of P1 to P4 are all set to the low level.
CCB INTERFACE, SHIFT REGISTER, CONTROL REGISTER
When a reset is applied, The CONTROL REGISTER is forcibly initialized internally. Then, when control data are
transferred, the LSI operates according to the control data.
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