參數(shù)資料
型號: LC74794
廠商: Sanyo Electric Co.,Ltd.
英文描述: On-Screen Display Controller LSI(用于屏幕顯示控制器規(guī)模集成電路(LSI))
中文描述: 屏幕顯示控制器芯片(用于屏幕顯示控制器規(guī)模集成電路(LSI)的)
文件頁數(shù): 22/30頁
文件大?。?/td> 217K
代理商: LC74794
No. 5557-22/30
LC74794, 74794M
COMMAND14 (VPS/PDC control setup command)
First byte
DA
0 to 7
7
6
5
4
3
2
1
0
Register
Contents
Notes
State
1
1
1
1
0
1
1
1
Function
Extended command 7 identification code
Command 7 identification code
Display control setup
Second byte
DA
0 to 7
7
6
5
Register
Contents
Notes
State
0
0
0
0
1
0
1
Function
Second byte identification bit
4
HBS2
Discrimination mode 1
Discrimination mode 2
Discrimination mode 1
Discrimination mode 2
Error checking enabled (Error checking can be turned on or off on a per-byte
basis.)
Error checking disabled (Applications can select whether to hold or write
data with errors on a per-byte basis.)
Data hold
Data write (In VPS mode, the error bit is set to 0.)
Error checking turned on for data unused bytes.
VPS: bytes 3, 4, and 6 to 10. PDCC (8/30/2): bytes 7 to 12. Header 1: bytes
14 to 37. Header 2: bytes 14 to 29, Header 3: bytes 14 to 21. Status 1 (3):
bytes 7 to 25. Status 2 (4): bytes 7 to 35.
Error checking turned off for data unused bytes.
VPS: bytes 3, 4, and 6 to 10. PDCC (8/30/2): bytes 7 to 12. Header 1: bytes
14 to 37. Header 2: bytes 14 to 29, Header 3: bytes 14 to 21. Status 1 (3):
bytes 7 to 25. Status 2 (4): bytes 7 to 35.
Clock line
3
HBS1
Framing code
0
2
BMS
1
1
EMS
0
1
0
0
DCE
1
Note: All registers are set to 0 when the LC74794/M is reset by the RST pin.
When 0, bytes for which error checking is
specified and that have no errors are written to
P-S. When 1, all bytes are written to P-S
regardless of errors.
The handling of bytes for which error checking
is turned off when error checking is enabled.
Error checking specification for bytes whose
data is unused.
Bi-phase (VPS), Hamming (PDC), or odd
parity (header)
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