參數(shù)資料
型號(hào): LC74772V
廠商: Sanyo Electric Co.,Ltd.
英文描述: Camcorder On-Screen Display LSI
中文描述: 攝像機(jī)屏幕顯示大規(guī)模集成電路
文件頁(yè)數(shù): 6/16頁(yè)
文件大?。?/td> 176K
代理商: LC74772V
Display Control Commands
The display control commands have an 8-bit serial input format. Data is input LSB first.
Display Control Command Table
No. 5159-6/16
LC74772V
First byte
Second byte
Command
Command code
Data
Data
D7
D6
D5
D4
D3
D2
D1
D0
D7
D6
D5
D4
D3
D2
D1
D0
COMMAND 0
System setup 1
0
0
0
0
RST
SYS
RAM
CLR
OSC
STP
TST
MOD
COMMAND 1
System setup 2
0
0
0
1
CSYN
MOD POLT MOD1 MOD0
CLK
CLK
CLK
COMMAND 2
Input control setup
0
0
1
0
VSYN HSYN DATA
POLT POLT
ART
FMT
FMT
COMMAND 3
General-purpose port control
0
0
1
1
PORT OUT
SET
OUT
P10
OUT
P9
P11
COMMAND 4
Display operation control:
reverse video and blinking
RVS
ON
BLK
ON
BLK
1
BLK
0
0
1
0
0
COMMAND 5
Display control: on/off settings
for each output
DSP
4
DSP
3
DSP
2
DSP
1
0
1
0
1
COMMAND 6
Output control: systems 3 and 4
0
1
1
0
DSPF
SL34
DSP
RSG
DSP
GSG
DSP
BSG
COMMAND 8
Display control: border
1
0
0
0
0
BKC
R
BKC
G
BKC
B
BKO4 BKO4 BKO3 BKO3 BKO2 BKO2 BKO1 BKO1
F1
F0
F1
F0
F1
F0
F1
F0
COMMAND 9
Display start position
1
0
0
1
VP5
VP4
VP3
VP2
VP1
VP0
HP5
HP4
HP3
HP2
HP1
HP0
COMMAND 10
Display line control
1
0
1
0
LNF
SZ
LNF
OT4
LNF
OT3
LN
SEL
0
0
LIN
126
LIN
115
LIN
104
LIN
93
LIN
82
LIN
71
COMMAND 11
RAM write address
1
0
1
1
VADR VADR VADR VADR
3
2
0
0
0
HADR HADR HADR HADR HADR
4
3
2
1
0
1
0
COMMAND 14
Display RAM setup data
1
1
1
BLK
RV
R
G
B
C7
C6
C5
C4
C3
C2
C1
C0
x
y
x
Command code: (These 4 bits in the first byte identify the command.)
Command 14 is recognized by the upper 3 bits.
y
Command data: (These bits specify the data for each command.)
For commands 0 through 7, 8 bits of data are read in.
For commands 8 through 14, 16 bits of data are read in.
If the command 1 data-9 bit (DATAFMT) was set to 1, after the first byte of a command 14 is read
in, the system goes to continuous transfer mode for reading in a series of following bytes.
Note: 1. If the CS pin is set high, the command state is set to the command 0 (system control setup) state.
2. If a system reset is executed from the RST pin or by a command reset, the command register is set tot 0.
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