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參數(shù)資料
| 型號： | LC74751 |
| 廠商： | Sanyo Electric Co.,Ltd. |
| 英文描述： | On-Screen Display LSI |
| 中文描述： | 屏幕顯示大規(guī)模集成電路 |
| 文件頁數(shù)： | 11/15頁 |
| 文件大小： | 439K |
| 代理商： | LC74751 |
No. 5396-11/15
LC74751
Memory (Display ROM) Organization
This memory has addresses ranging from 0 (000 hexadecimal) to 1535 (5FF hexadecimal).
Data has 8 bits.
Bit
DA
DA
DA
DA
DA
DA
DA
DA
DA
DA
DA
DA
DA
DA
DA
DA
Notes
Address
F
E
D
C
B
A
9
8
7
6
5
4
3
2
1
0
000
(000h)
0
0
0
0
0
0
0
0
ROM/
RAM
ADR6
ADR5
ADR4
ADR3
ADR2
ADR1
ADR0
Line ROM: First character in the
first line
0023
(017h)
0
0
0
0
0
0
0
0
ROM/
RAM
ADR6
ADR5
ADR4
ADR3
ADR2
ADR1
ADR0
Line ROM: 24th character in the
first line
0024
(018h)
0
0
0
0
0
0
0
0
ROM/
RAM
ADR6
ADR5
ADR4
ADR3
ADR2
ADR1
ADR0
Line ROM: First character in the
second line
ROM/
RAM
Character code
1535
(5FFh)
0
0
0
0
0
0
0
0
ROM/
RAM
ADR6
ADR5
ADR4
ADR3
ADR2
ADR1
ADR0
Line ROM: 24th character in the
64th line
DA
0 to 8
Register
Contents
Notes
State
Function
0
ADR0
0
1
1
ADR1
0
1
2
ADR2
0
1
3
ADR3
0
1
4
ADR4
0
1
5
ADR5
0
1
6
ADR6
0
1
7
ROM/
RAM
0
Data is read directly from character ROM.
1
Data is read from character ROM through RAM.
Specifies an address in character ROM.
When specifying display control RAM, DA7 must be set to 1 and ADR0 to
ADR6 must be set to 0.
The address specification range for character ROM is 0 to 127 (7F
hexadecimal).
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| LC7475 | On-screen Display Controller for PAL-format Video |
| LC74760 | On-Screen Display IC |
| LC74760M | On-Screen Display IC |
| LC74761 | On-Screen Display LSI |
| LC74761M | On-Screen Display LSI |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| LC74759JM-9820-TRM-E | 制造商:SANYO Semiconductor Co Ltd 功能描述:ELECTRONIC COMPONENT |
| LC74760 | 制造商:SANYO 制造商全稱:Sanyo Semicon Device 功能描述:On-Screen Display IC |
| LC74760M | 制造商:SANYO 制造商全稱:Sanyo Semicon Device 功能描述:On-Screen Display IC |
| LC74761 | 制造商:SANYO 制造商全稱:Sanyo Semicon Device 功能描述:On-Screen Display LSI |
| LC74761_11 | 制造商:SANYO 制造商全稱:Sanyo Semicon Device 功能描述:On-Screen Display LSI |
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