
LC7442, 7442E
Specifications
Absolute Maximum Ratings
at Ta = 25 ±2°C, V
SS
= 0 V
Paramater
Maximum supply voltage
Maximum input voltage
Maximum output voltage
Allowable power dissipation
Symbol
V
DD
max
V
IN
max
V
OUT
max
Ratings
–0.3 to +7.0
–0.3 to V
DD
+ 0.3
–0.3 to V
DD
+ 0.3
Unit
V
V
V
mW
mW
°C
°C
Pd
1
max (DIP version)
Pd
2
max (QFP version)
Topr
Tstg
500
350
Operating temperature
Storage temperature
–10 to +70
–55 to +125
Allowable Operating Ranges
at Ta = –10 to +70°C, V
SS
= 0 V
Ratings
typ
5.0
Paramater
Symbol
Conditions
min
max
Unit
Power supply voltage
Input high level voltage
V
DD
V
IH1
V
IH2
V
IL1
V
IL2
V
REF
4.5
5.5
V
V
V
V
V
V
CMOS levels
TTL levels
CMOS levels
TTL levels
V
REF
pin
0.7 V
DD
2.2
Input low level voltage
0.3 V
DD
0.8
V
DD
Reference voltage
3.4
0.8 V
DD
Electrical Characteristics
at Ta = 25 ±2°C, V
DD
= 5 V ±10%, V
SS
= 0 V
Ratings
typ
Paramater
Symbol
Conditions
min
V
DD
– 1
V
DD
– 1
max
Unit
Output high level voltage
V
OH1
V
OH2
V
OL1
V
OL2
I
DD
D
I
DD
A
I
DD
O
I
DD
K
I
OH
= –1 mA; Pins KCP and OCP
I
OH
= –1 mA; Pins other than KCP and OCP
I
OL
= 1 mA; Pins KCP and OCP
I
OL
= 2 mA; Pins other than KCP and OCP
RES: H
OV, KV: 60 Hz
OH, KH: 15 kHz
A/D data: 1010
Output unloaded
V
V
V
V
Output low level voltage
1.0
0.4
Operating current dissipation
The DV
SS
pin
The AV
SS
pin
The OV
SS
pin
The KV
SS
pin
20
21
mA
mA
mA
mA
2
2
Static current dissipation
I
DD
S
RES: L,
Input pin DC, output unloaded
10
μA
Input leakage current
Output leakage current
D/A output resistance
I
LK
I
OZ
R
DA
V
I
= V
DD
, V
SS
V
I
= V
DD
, V
SS
; Pins KCP and OCP
–1
–1
1
1
μA
μA
150
Note: There are 4 power supply pin systems.
The power supplies are DV
DD
, AV
DD
, OV
DD
, and KV
DD
, and they must be identical. Descriptions are for V
DD
.
The grounds are DV
SS
, AV
SS
, OV
SS
and KV
SS
, and they must be identical. Descriptions are for V
SS
.
Switching Characteristics
at Ta = 25 ±2°C, V
DD
= 5 V ±10%, V
SS
= 0 V
Ratings
typ
Paramater
Symbol
min
max
Unit
Vertical sync signals
Pulse width
Rise time
Fall time
Pulse width
Rise time
Fall time
Pulse width
Rise time
Fall time
Data setup
Data hold
Interval
Pulse width
Rise time
Fall time
Setup
Hold
t
VW
t
VR
t
VF
t
HW
t
HR
t
HF
t
SCW
t
SCR
t
SCF
t
DSU
t
DH
t
SCI
t
CW
t
CR
t
CF
t
CSU
t
CH
1
μs
ns
ns
μs
ns
ns
ns
ns
ns
ns
ns
μs
ns
ns
ns
ns
ns
50
50
Horizontal sync signals
1
50
50
Serial data interface
Serial clock
200
50
50
100
30
2
Control
200
50
50
200
200
No. 4412-14/22