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參數(shù)資料
| 型號： | LC7218 |
| 廠商： | Sanyo Electric Co.,Ltd. |
| 英文描述： | PLL Frequency Synthesizer for Electronic Tuning in AV Systems |
| 中文描述： | 鎖相環(huán)頻率合成器的AV系統(tǒng)的電子調諧 |
| 文件頁數(shù)： | 10/16頁 |
| 文件大小： | 265K |
| 代理商： | LC7218 |
Serial Data I/O Methods
The LC7218 supports a total of three I/O modes: two control data input (serial data input) modes and one DO output
(serial data output) mode. Data I/O is performed after the mode has been determined.
The mode is selected by four data items (A
0
to A
3
) synchronized with a clock (the CL pin) applied before the CE pin is
set high. The mode is determined when the CE pin goes high.
1. In the serial data input modes (modes 1 and 2), t
1
≥
1.5 μs, t
2
≥
0 μs, t
3
≥
1.5 μs, and t
4
< 1.5 μs.
Mode 1: A total of 40 bits, the four mode selection bits and the 36 control data bits (from D
0
to T
1
), are input from
the DI pin in synchronization with the clock (CL) signal.
Mode 2: A total of 28 bits, the four mode selection bits and 24 control data bits (from D
0
to CTEN), are input from
the DI pin in synchronization with the clock (CL) signal.
No. 4758-10/16
LC7218, 7218M, 7218JM
Mode
A
3
A
2
A
1
A
0
Item
Function
This mode is used to input all 36 bits of the control data (serial input data).
This mode is used for initialization following power on and to change data that
cannot be changed in mode 2. All 36 bits of the control data is input from the
LC7218 DI pin.
1
0
0
0
1
Serial data input (all bits)
This mode is used to input a subset (24 bits) of the control data (serial input
data).
This mode is used to change three data items: the programmable divider data
(D
0
to D
15
), the output port data (O
0
to O
6
) and the general-purpose counter
start data (CTEN), for a total of 24 bits. The other 12 bits of control data are not
changed by a mode 2 operation. (Use mode 1 when the other 12 bits must be
changed.)
Serial data input
(partial input)
2
0
0
1
0
The DO output mode (serial data output) is used to output three data items from
the DO pin: the input port data, the general-purpose counter binary data and the
PLL unlock state data.
3
0
0
1
1
Serial data output
0 to 0
1 to 0
0 to 0
0 to 0
Invalid setting
This mode is invalid and does not support any data input or output operations.
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相關代理商/技術參數(shù) |
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|---|---|
| LC72-18 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Laser Diode with Monitor Diode |
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| LC7218JM | 制造商:SANYO 制造商全稱:Sanyo Semicon Device 功能描述:PLL Frequency Synthesizer for Electronic Tuning in AV Systems |
| LC7218M | 制造商:SANYO 制造商全稱:Sanyo Semicon Device 功能描述:PLL Frequency Synthesizer for Electronic Tuning in AV Systems |
| LC7218M-TLM-E | 制造商:Sony Semiconductor Solutions Division 功能描述: |
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