參數(shù)資料
型號(hào): LC72121
廠商: Sanyo Electric Co.,Ltd.
英文描述: PLL Frequency Synthesizers for Electronic Tuning
中文描述: 鎖相環(huán)頻率合成器電子調(diào)諧
文件頁(yè)數(shù): 5/22頁(yè)
文件大?。?/td> 379K
代理商: LC72121
No. 5815-5/22
LC72121, 72121M, 72121V
Parameter
Symbol
Conditions
Ratings
Unit
min
typ
max
V
OL
1
PD: I
O
= 1 mA
BO1 to BO4, IO1, IO2: I
O
= 1 mA
BO1 to BO4, IO1, IO2: I
O
= 8 mA
DO: I
O
= 5 mA
AOUT: I
O
= 1 mA, AIN = 1.3 V
CE, DI, CL: V
I
= 6.5 V
IO1, IO2: V
I
= 13 V
XIN: V
I
= V
DD
FMIN, AMIN: V
I
= V
DD
IFIN: V
I
= V
DD
AIN: V
I
= 6.5 V
CE, DI, CL: V
I
= 0 V
IO1, IO2: V
I
= 0 V
XIN: V
I
= 0 V
FMIN, AMIN: V
I
= 0 V
IFIN: V
I
= 0 V
AIN: V
I
= 0 V
BO1 to BO4, IO1, IO2, AOUT: V
O
= 13 V
DO: V
O
= 6.5 V
PD: V
O
= V
DD
PD: V
O
= 0 V
FMIN
1.0
V
V
OL
2
0.2
V
Output low-level voltage
1.6
V
V
OL
3
V
OL
4
I
IH
1
I
IH
2
I
IH
3
I
IH
4
I
IH
5
I
IH
6
I
IL
1
I
IL
2
I
IL
3
I
IL
4
I
IL
5
I
IL
6
I
OFF
1
I
OFF
2
I
OFFH
I
OFFL
C
IN
1.0
V
0.5
V
5.0
μA
5.0
μA
Input high-level current
1.3
8
μA
2.5
15
μA
5.0
30
μA
200
nA
5.0
μA
5.0
μA
Input low-level current
1.3
8
μA
2.5
15
μA
5.0
30
μA
200
nA
Output off leakage current
5.0
μA
5.0
μA
High-level 3-state off leakage current
0.01
200
nA
Low-level 3-state off leakage current
0.01
200
nA
Input capacitance
6
pF
I
DD
1
V
DD
: Xtal = 7.2 MHz, f
IN
2 = 130 MHz,
V
IN
2 = 20 mVrms
V
DD
: PLL block stopped (PLL inhibit mode)
Crystal oscillator operating
(crystal frequency: 7.2 MHz)
2.5
6
mA
Supply current
I
DD
2
0.3
mA
I
DD
3
V
DD
: PLL block stopped, crystal oscillator
stopped
10
μA
Continued from preceding page.
Pin Descriptions
Pin
name
Pin No.
Type
Function
Equivalent circuit
LC72121
Xtal
Crystal oscillator element connections (4.5 or 7.2 MHz)
XIN
XOUT
1
22
1
24
LC72121V
Local
oscillator
signal input
FMIN is selected when DVS in the serial data is set to 1.
Input frequency: 10 to 160 MHz
The signal is passed through an internal divide-by-two prescaler and
then input to the swallow counter.
The divisor can be set to a value in the range 272 to 65535. Since
the internal divide-by-two prescaler is used, the actual divisor will be
twice the set value.
FMIN
16
17
Local
oscillator
signal input
AMIN is selected when DVS in the serial data is set to 0.
When SNS in the serial data is set to 1:
Input frequency: 2 to 40 MHz
The signal is input to the swallow counter directly.
The divisor can be set to a value in the range 272 to 65535. The
set value becomes the actual divisor.
When SNS in the serial data is set to 0:
Input frequency: 0.5 to 10 MHz
The signal is input to a 12-bit programmable divider directly.
The divisor can be set to a value in the range 4 to 4095. The set
value becomes the actual divisor.
AMIN
15
16
Continued on next page.
相關(guān)PDF資料
PDF描述
LC72121M PLL Frequency Synthesizers for Electronic Tuning
LC72122V PLL Frequency Synthesizer for Portable Equipment Electronic Tuning
LC72130 AM/FM PLL Frequency Synthesizers(AM/FM鎖相環(huán)頻率合成器)
LC72131 AM/FM PLL Frequency Synthesizers(AM/FM鎖相環(huán)頻率合成器)
LC72132 AM/FM PLL Frequency Synthesizers(AM/FM鎖相環(huán)頻率合成器)
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