參數(shù)資料
型號(hào): LC651306A
廠(chǎng)商: Sanyo Electric Co.,Ltd.
英文描述: 4-Bit Single-Chip Microcontroller for Small-Scale Control Applications(用于小規(guī)??刂茟?yīng)用的單片4位微控制器)
中文描述: 4位單片機(jī)的小規(guī)模控制中的應(yīng)用(用于小規(guī)??刂茟?yīng)用的單片4位微控制器)
文件頁(yè)數(shù): 14/21頁(yè)
文件大小: 698K
代理商: LC651306A
LC651306A/04A/02A/01A
14/21
Ratings
typ.
Parameter
Symbol
Conditions
VDD[V]
Applicable pins
and notes
min.
max.
unit
Pulse output
Period
tPCY
tPH
tPL
PE0
PE0
64
×
TCYC
32
×
TCYC
±
10%
32
×
TCYC
±
10%
High level pulse width
Low level pulse width
Fig.7
TCYC=4
×
system clock
Select only Nch OD option,
and add external 1k
resistor
and external 50pF capacitor.
AV
+
=VDD
AV
-
=VSS
When AD speed is
1/1=26*TCYC
PE0
μ
s
Resolution
Absolute
precision
Conversion time
8
±
1
±
2
bit
LSB
24
(TCYC=
0.92
μ
s)
47
(TCYC=
0.92
μ
s)
VSS
312
(TCYC
=12
μ
s)
612
(TCYC
=12
μ
s)
VDD
TCAD
When AD speed is
1/2=51*TCYC
μ
s
Analog
voltage range
Analog
input current
input
VAIN
AD0 to AD7
V
Including the output off leakage
current.
VAIN=VDD
VAIN=VSS
1
A
port
IAIN
3 to 6
AD0 to AD7
(The shared I/O
function
have open-drain
specification)
WDR
WDR
WDR
WDR
ports
-1
μ
A
Cw
Rw
Rl
tWCT
When PE1 is using open-drain
When PE1 is using open-drain
When PE1 is using open-drain
Fig.8
100
0.1
±
5%
680
±
1%
100
±
1%
μ
F
k
μ
s
Recommended
constants
(Note 10)
Clear time
(discharge)
Clear period
(charge)
Recommended
constants
(Note 10)
tWCCY
Fig.8
3 to 6
WDR
36
ms
Cw
When PE1 is using open-drain
WDR
0.01
±
5%
680
±
1%
100
±
1%
μ
F
k
μ
s
Rw
When PE1 is using open-drain
WDR
Rl
When PE1 is using open-drain
WDR
Clear time
(discharge)
Clear period
(charge)
tWCT
Fig.8
WDR
10
W
tWCCY
Fig.8
2.5 to 6
WDR
4.2
ms
Notes:
(1) When oscillated internally under the oscillating conditions in Fig.3, generated voltage can be over the maximum limit of
the VDD.
(2) Average for 100 ms period.
(3) Operating supply voltage VDD must be held until the microcontroller enters in the standby mode after the execution of the
HALT instruction. Any chattering should not be generated at the PA3 pin during the HALT instruction execution cycle.
(4) Recommended circuit constants that are verified by the oscillator manufacturer, using oscillator characteristic evaluation
board selected by SANYO.
(5) The OSC1 pin will have schmitt characteristics when external clock oscillator or the two-pin RC oscillator is selected as
an oscillation option.
(6) These are the results of testing using the value at each part on the Fig.3 circuit which is recommended by SANYO. These
results do not include the current applied to the output transistor, nor the current applied to the transistor with a pull-up
resistor on the LSI.
(7) fCFOSC is the frequency when the values in table 1 are used.
(8) This indicates the elapsed time that is required before the oscillation becomes stable after the VDD exceeds the minimum
limit of the operation supply voltage.
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