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參數(shù)資料
| 型號： | LC35256D |
| 廠商： | Sanyo Electric Co.,Ltd. |
| 英文描述： | 256K asynchronous silicon gate CMOS static RAM(256K異步硅門CMOS靜態(tài)RAM) |
| 中文描述： | 256K異步硅柵CMOS靜態(tài)RAM（256K異步硅門的CMOS靜態(tài)RAM）的 |
| 文件頁數(shù)： | 4/8頁 |
| 文件大?。?/td> | 107K |
| 代理商： | LC35256D |
AC Electrical Characteristics
at Ta = –40 to +85°C, V
CC
= 4.5 to 5.5 V
No. 5823-4/8
LC35256D-10, LC35256DM, DT-70/10
LC35256D, DM, DT
Parameter
Symbol
-70
*
-10
Unit
min
max
min
max
Read cycle time
t
RC
t
AA
t
CA
t
OA
t
OH
t
COE
t
OOE
t
COD
t
OOD
70
100
ns
Address access time
70
100
ns
CE access time
70
100
ns
OE access time
35
50
ns
Output hold time
10
10
ns
CE output enable time
10
10
ns
OE output enable time
5
5
ns
CE output disable time
30
30
ns
OE output disable time
25
25
ns
Read Cycle
Note
*
: Specification values for the LC35256DM and LC35256DT.
LC35256D, DM, DT
Parameter
Symbol
-70
*
-10
Unit
min
max
min
max
Write cycle time
t
WC
t
AS
t
WP
t
CW
t
WR
t
WR1
t
DS
t
DH
t
DH1
t
WOE
t
WOD
70
100
ns
Address setup time
0
0
ns
Write pulse width
55
60
ns
CE setup time
60
70
ns
Write recovery time
0
0
ns
CE write recovery time
0
0
ns
Data setup time
35
40
ns
Data hold time
0
0
ns
CE data hold time
0
0
ns
WE output enable time
5
5
ns
WE output disable time
30
30
ns
Write Cycle
Note
*
: Specification values for the LC35256DM and LC35256DT.
Note
*
: –2.0 V for pulse widths of up to 30 ns.
[3-V Operation]
Parameter
Symbol
Conditions
Ratings
Unit
min
typ
max
Supply voltage
V
CC
V
IH
V
IL
2.7
3.0
3.6
V
Input voltages
V
CC
– 0.2
–0.3
*
V
CC
+ 0.3
V
+0.2
V
DC Allowable Operating Ranges
at Ta = –40 to +85°C, V
CC
= 2.7 to 3.6 V
AC test conditions
Input pulse voltage level
V
IH
= 2.4 V, V
IL
= 0.6 V
5 ns
Input rise and fall times
Input and output timing level
1.5 V
Output load
LC35256DM, DT-70
One TTL gate + 30 pF (Including jig capacitances.)
LC35256D, DM, DT-10
One TTL gate + 100 pF (Including jig capacitances.)
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| LC35256FT | 256K (32768 words X 8 bits) SRAM Control Pins: OE and CE |
| LC35256FT-55U | 256K (32768 words X 8 bits) SRAM Control Pins: OE and CE |
| LC35256FT-70U | 256K (32768 words X 8 bits) SRAM Control Pins: OE and CE |
| LC35256D-10 | Dual Control Pins: OE and CE 256K (32768-word X 8-bit) SRAM |
| LC35256DT-70 | Dual Control Pins: OE and CE 256K (32768-word X 8-bit) SRAM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| LC35256D-10 | 制造商:SANYO 制造商全稱:Sanyo Semicon Device 功能描述:Dual Control Pins: OE and CE 256K (32768-word X 8-bit) SRAM |
| LC35256DM | 制造商:SANYO 制造商全稱:Sanyo Semicon Device 功能描述:Dual Control Pins: OE and CE 256K (32768-word X 8-bit) SRAM |
| LC35256DM-10 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述: |
| LC35256DM-70 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x8 SRAM |
| LC35256DT | 制造商:未知廠家 制造商全稱:未知廠家 功能描述: |
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