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參數(shù)資料
| 型號： | LB1955 |
| 廠商： | Sanyo Electric Co.,Ltd. |
| 元件分類： | 基準電壓源/電流源 |
| 英文描述： | Three-Phase Brushless Motor Driver |
| 中文描述： | 三相無刷電機驅(qū)動器 |
| 文件頁數(shù)： | 2/7頁 |
| 文件大?。?/td> | 127K |
| 代理商： | LB1955 |
No. 5452-2/7
LB1955
Electrical Characteristics
at Ta = 25°C, V
CC
= 12 V
Note:
*
is provided for when X is the peak value at the 60° position of the lower side of the U
IN
1 Hall amplifier input: THPG = 1.17X.
Parameter
Symbol
Conditions
Ratings
Unit
min
typ
max
[Power Supply]
Current drain
I
CC
V
REF
V
C
= 0 V, LCTR = 6 V
7.0
10.0
13.0
mA
IC internal power supply
4.75
5.0
5.25
V
[Output]
Output saturation voltage
V
O(sat)
1
I
O
= 400 mA
V
C
= 5 V, R
f
= 0
I
O
= 800 mA
V
C
= 5 V, R
f
= 0
I
O
= 100 mA, R
f
= 0.47
Sink side
0.4
V
Source side
1.5
V
Output saturation voltage 2
V
O(sat)
2
Sink side
0.7
V
Source side
2.0
V
3-phase output current ripple
Ior
–5
+5
%
[Hall Amplifier]
Input offset voltage
VHoff
–20
+20
mV
Input bias current
IHb
V
AGC
= 1.4 V
U
IN
10
μA
V
IN
, W
IN
5
μA
Common-mode input voltage range
V
HCM
2.2
5.0
V
[Control]
VC pin input bias current
I
VCb
V
C
= 0 V
R
f
= 0.47
, I
O
≥
10 mA
With the Hall input logic fixed
–10
–1.3
μA
Control start voltage
V
THVC
2.25
2.5
2.75
V
Open-loop control gain
G
MVC
R
f
= 0.47
,
I
O
= 200 mA
With the Hall input logic fixed and VG shorted to RF
0.72
0.9
1.08
A/V
[PG]
PG Hall amplifier
input offset voltage
V
PGoff
Design target
–10
+10
mV
Peak hold charge current
I
SHCHG
THPG
(U, V, W) = (L, L, H)
30
μA
PG comparator threshold
Design target
*
117
%
PG output high-level voltage
V
PGH
I
LEAKPG
4.5
5.2
V
PG leakage current
–10
0
+10
μA
[FG]
Back emf Schmitt input
hysteresis width
V
SCHG
In the back emf Schmitt input increasing direction, Design target
100
mV
In the back emf Schmitt input decreasing direction, Design target
0
mV
Ringing canceller Schmitt
input hysteresis width
V
SCHR
In the Schmitt input increasing direction, Design target
In the Schmitt input decreasing direction, Design target
180
mV
mV
–20
0
+20
FG output high-level voltage
V
FGH
I
LEAKFG
FGR = 0 V
4.5
5.2
V
FG leakage current
–10
0
+10
μA
[TSD]
Thermal shutdown
operating temperature
TTSD
Design target
180
°C
Thermal shutdown
temperature hysteresis width
TSD
Design target
15
°C
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