參數(shù)資料
型號: LB11870
廠商: Sanyo Electric Co.,Ltd.
元件分類: 基準電壓源/電流源
英文描述: Three-Phase Brushless Motor Driver for Polygonal Mirror Motors
中文描述: 三相無刷電機的多邊形鏡馬達驅動器
文件頁數(shù): 3/14頁
文件大小: 204K
代理商: LB11870
No. 7256 -3/14
LB11870
Continued from preceding page.
Parameter
Symbol
Conditions
Ratings
Unit
min
typ
max
[Phase Comparator Output]
High-level output voltage
VPDH
I
OH
= –100 μA
I
OL
= 100 μA
VPD = VREG/2
VREG – 0.2
VREG – 0.1
V
Low-level output voltage
VPDL
0.2
0.3
V
Output source current
IPD+
–0.5
mA
Output sink current
IPD–
VPD = VREG/2
1.5
mA
[Lock Detection Output]
Output saturation voltage
V
OL
(LD)
IL (LD)
ILD = 10 mA
0.15
0.5
V
Output leakage current
V
O
= V
CC
10
μA
[Error Amplifier Block]
Input offset voltage
V
IO
(ER)
IB (ER)
Design target value
–10
10
mV
Input bias current
–1
1
μA
Output H level voltage
V
OH
(ER)
V
OL
(ER)
VB (ER)
I
OH
= –500 μA
I
OL
= 500 μA
VREG – 1.2
VREG – 0.9
V
Output L level current
0.9
1.2
V
DC bias level
–5%
VREG/2
5%
V
[Current limiter Circuit]
Drive gain 1
GDF1
When the phase is locked
0.4
0.5
0.6
deg
Drive gain 2
GDF2
When not locked
0.8
1.0
1.2
deg
Limiter voltage
VRF
V
CC
-V
M
0.45
0.5
0.55
V
[Thermal Shutdown Operation]
Thermal shutdown operating temperature
TSD
TSD
Design target value (junction temperature)
150
175
°C
Hysteresis width
Design target value (junction temperature)
40
°C
[Low-Voltage Protection]
Operating voltage
VSD
VSD
8.1
8.45
8.9
V
Hysteresis width
0.2
0.35
0.5
V
[CLD Circuit]
External capacitor charge current
ICLD
–6
–4.3
–3
μA
Operating voltage
V
H
(CLD)
3.25
3.5
3.75
V
[CLK Pin]
External input frequency
fI (CLK)
0.1
10
kHz
High-level input voltage
V
IH
(CLK)
V
IL
(CLK)
V
IO
(CLK)
V
IS
(CLK)
I
IH
(CLK)
I
IL
(CLK)
3.5
VREG
V
Low-level input voltage
0
1.5
V
Input open voltage
VREG – 0.5
VREG
V
Hysteresis width
0.35
0.5
0.65
V
High-level input current
VCLK = VREG
–10
0
10
μA
Low-level input current
VCLK = 0 V
–280
–210
μA
[S/S Pin]
High-level input voltage
V
IH
(SS)
V
IL
(SS)
V
IO
(SS)
V
IS
(SS)
I
IH
(SS)
I
IL
(SS)
3.5
VREG
V
Low-level input voltage
0
1.5
V
Input open voltage
VREG – 0.5
VREG
V
Hysteresis width
0.35
0.5
0.65
V
High-level input current
VS/S = VREG
–10
0
10
μA
Low-level input current
VS/S = 0 V
–280
–210
μA
[BRSEL Pin]
High-level input voltage
V
IH
(BRSEL)
V
IL
(BRSEL)
V
IO
(BRSEL)
I
IH
(BRSEL)
I
IL
(BRSEL)
3.5
VREG
V
Low-level input voltage
0
1.5
V
Input open voltage
VREG – 0.5
VREG
V
High-level input current
V
BRSEL
= VREG
V
BRSEL
= 0 V
–10
0
10
μA
Low-level input current
–220
–160
μA
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參數(shù)描述
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