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參數(shù)資料
| 型號(hào)： | LB11690H |
| 元件分類： | 運(yùn)動(dòng)控制電子 |
| 英文描述： | BRUSHLESS DC MOTOR CONTROLLER, 0.04 A, PDSO38 |
| 封裝： | 0.375 INCH, HSOP-36 |
| 文件頁數(shù)： | 13/19頁 |
| 文件大?。?/td> | 201K |
| 代理商： | LB11690H |
No. 7543-3/19
LB11690, 11690H
Continued from preceding page.
Parameter
Symbol
Conditions
Ratings
Unit
min
typ
max
[12 V Constant Voltage Output (V12 pin)]
Output voltage
V12REG
IO = – 5 mA
11.2
12.0
12.8
V
Line regulation
V12REG1
VCC = 15 to 42 V
120
240
mV
Load regulation
V12REG2
IO = –5 to –30 mA
10
30
mV
Temperature coefficient
V12REG3
Design target value*
0
mV/°C
[Output Block] Conditions: UOUT = VOUT = WOUT = 18 V, when 48 V is applied to VB
Output high level voltage 1
VOH1
UL, VL, and WL pins, IOH = –10 mA
V12 – 1.2
V12 – 0.8
V
Output low level voltage 1
VOL1
UL, VL, and WL pins, IOL = 10 mA
0.8
1.2
V
Output high level voltage 2
VOH2
UH, VH, and WH pins, IOH = –5 mA
46.8
47.2
V
Output low level voltage 2
VOL2
UH, VH, and WH pins, IOL = 5 mA
18.2
18.6
V
[Charge Pump Output (VB pin)]
Output voltage
VBOUT
46.0
48.0
50.5
V
[CP1 Pin]
Output high level voltage
VOH (CP1)
ICP1 = –2 mA
VCC – 1.9
VCC – 1.4
V
Output low level voltage
VOL (CP1)
ICP1 = 2 mA
1.5
2.0
V
[Integrating Amplifier]
Input offset voltage
VIO (CONT)
–10
+10
mV
Input bias current
IB (CONT)
–1
+1
A
Common-mode input voltage range
VICM
0
V5 – 1.7
V
Output high level voltage
VOH (CONT) ITOC = –0.2 mA
V5 – 1.1
V5 – 0.8
V
Output low level voltage
VOL (CONT)
ITOC = 0.2 mA
0.8
1.1
V
Open-loop gain
f (CONT) = 1 kHz
45
51
dB
[PWM Oscillator (PWM pin)]
Output high level voltage
VOH (PWM)
2.75
3.0
3.25
V
Output low level voltage
VOL (PWM)
1.0
1.2
1.3
V
External capacitor charge current
ICHG
VPWM = 2.1 V
–35
–25
–19
A
Oscillator frequency
f (PWM)
C = 270 pF
31
39
48
kHz
Amplitude
V (PWM)
1.6
1.8
2.1
Vp-p
[TOC Pin]
Input voltage 1
VTOC1
Output duty: 100%
2.72
3.0
3.30
V
Input voltage 2
VTOC2
Output duty: 0%
0.99
1.2
1.34
V
Input voltage 1L
VTOC1L
Design target value*, 100% when V5 = 4.7 V
2.72
2.80
2.90
V
Input voltage 2L
VTOC2L
Design target value*, 0% when V5 = 4.7 V
0.99
1.08
1.17
V
Input voltage 1H
VTOC1H
Design target value*, 100% when V5 = 5.3 V
3.08
3.20
3.30
V
Input voltage 2H
VTOC2H
Design target value*, 0% when V5 = 5.3 V
1.11
1.22
1.34
V
[Current Limiter Circuit (RF pin)]
Limit voltage
VRF
85
100
115
V
Continued on next page.
Note :*Design target values and are not tested.
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