參數(shù)資料
型號： LAMXO1200E-3TN144E
廠商： Lattice Semiconductor Corporation
文件頁數(shù)： 14/77頁
文件大?。?/td> 0K
描述： IC FPGA 1.2KLUTS 144TQFP
標準包裝： 60
系列： LA-MachXO
可編程類型： 系統(tǒng)內(nèi)可編程
最大延遲時間 tpd(1)： 5.1ns
電壓電源 - 內(nèi)部： 1.14 V ~ 1.26 V
宏單元數(shù)： 600
輸入/輸出數(shù)： 113
工作溫度： -40°C ~ 125°C
安裝類型： 表面貼裝
封裝/外殼： 144-LQFP
供應商設備封裝： 144-TQFP（20x20）
包裝： 托盤
2-18
Architecture
Lattice Semiconductor
LA-MachXO Automotive Family Data Sheet
Table 2-10. Supported Output Standards
sysIO Buffer Banks
The number of Banks vary between the devices of this family. Eight Banks surround the two larger devices, the LA-
MachXO1200 and LA-MachXO2280 (two Banks per side). The LA-MachXO640 has four Banks (one Bank per
side). The smallest member of this family, the LA-MachXO256, has only two Banks.
Each sysIO buffer Bank is capable of supporting multiple I/O standards. Each Bank has its own I/O supply voltage
(VCCIO) which allows it to be completely independent from the other Banks. Figure 2-18, Figure 2-18, Figure 2-20
and Figure 2-21 shows the sysIO Banks and their associated supplies for all devices.
Output Standard
Drive
VCCIO (Typ.)
Single-ended Interfaces
LVTTL
4mA, 8mA, 12mA, 16mA
3.3
LVCMOS33
4mA, 8mA, 12mA, 14mA
3.3
LVCMOS25
4mA, 8mA, 12mA, 14mA
2.5
LVCMOS18
4mA, 8mA, 12mA, 14mA
1.8
LVCMOS15
4mA, 8mA
1.5
LVCMOS12
2mA, 6mA
1.2
LVCMOS33, Open Drain
4mA, 8mA, 12mA, 14mA
—
LVCMOS25, Open Drain
4mA, 8mA, 12mA, 14mA
—
LVCMOS18, Open Drain
4mA, 8mA, 12mA, 14mA
—
LVCMOS15, Open Drain
4mA, 8mA
—
LVCMOS12, Open Drain
2mA, 6mA
—
PCI33
3
N/A
3.3
Differential Interfaces
LVDS
1, 2
N/A
2.5
BLVDS, RSDS
2
N/A
2.5
LVPECL
2
N/A
3.3
1. LA-MachXO1200 and LA-MachXO2280 devices have dedicated LVDS buffers.
2. These interfaces can be emulated with external resistors in all devices.
3. Top Banks of LA-MachXO1200 and LA-MachXO2280 devices only.
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