參數(shù)資料
型號: LA76810A
廠商: Sanyo Electric Co.,Ltd.
英文描述: Monolithic Linear IC For PAL/NTSC Color Television Sets VIF/SIF/Y/Deflection 1chip IC
中文描述: 單片線性集成電路為PAL / NTSC制式彩電資料表格/應(yīng)力強度因子/年/撓度1chip集成電路
文件頁數(shù): 26/40頁
文件大?。?/td> 504K
代理商: LA76810A
www.DataSheet4U.com
signal
PAL
NTSC
LA76810A
NoA0252-26/40
Continued from preceding page.
Input signal
Symbol
Test point
Input signal
Test method
Bus bit/input signal
Burst gate pulse
I phase
BGPPH
Y IN:
Horizontal/
vertical sync
signal
PAL
Measure the time from the left end of Hsync at
pin 42 Y IN to the left end of the pin 28 FBP IN
wave form for Hsync period.
Y IN
SECAM V pulse length
SECAMV
Y IN:
Horizontal/v
ertical sync
signal
PAL
Measure the SECAM V pulse length T of the pin
28 FBPIN wave form.
Calculate as:
T(s)
×
15.625kHz
<Vertical screen size correction>
Vertical ramp output
Amplitude
PAL@64
NTSC@64
Vspal64
Vsnt64
Y IN:
Horizontal/
vertical sync
Monitor the pin 23 vertical ramp output and
measure the voltage at line 24 and line 310.
Calculate as follows:
Vsnt64 = Vline262-Vline22
Vertical ramp output
amplitude PAL@0
Vspal0
Y IN:
Horizontal/
vertical sync
signal
PAL
Monitor the pin 23 vertical ramp output and
measure the voltage at line 24 and line 310
Calculate as follows:
Vspal0 = Vline310-Vline24
Vertical ramp output
VSIZE: 0000000
Vertical ramp output
amplitude PAL@127
Vspal127
Y IN:
Horizontal/
vertical sync
signal
PAL
Monitor the pin 23 vertical ramp output and
measure the voltage at line 24 and line 310
Calculate as follows:
Vspal27 = Vline310-Vline24
Line 24
VSIZE: 1111111
Continued on next page.
42
28
Hsync
FB PIN
T
T
28
Line 310
Vertical ramp output
Line 310
Line 24
Vertical ramp output
Line 310
Line 24
23
23
23
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