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參數(shù)資料
| 型號(hào)： | LA7577N |
| 廠商： | Sanyo Electric Co.,Ltd. |
| 英文描述： | Super-Split，PLL-II VIF and SIF IF Signal Processor for TV/VCRs(用于電視機(jī)/VCR應(yīng)用的IF信號(hào)處理（鎖相環(huán)II VIF+SIF）電路) |
| 中文描述： | 超斯普利特，鎖相環(huán)-Ⅱ資料表格及SIF中頻信號(hào)處理器的電視/錄像機(jī)（用于電視機(jī)/錄像機(jī)應(yīng)用的中頻信號(hào)處理（鎖相環(huán)二資料表格強(qiáng)度因子）電路） |
| 文件頁數(shù)： | 13/16頁 |
| 文件大小： | 439K |
| 代理商： | LA7577N |
LA7577N
No. 4037—13/16
Equalization Amplifier (Pins 19 to 21)
The video signal, after passing through the 4.5MHz trap, is
input on pin 19 to the equalization amplifier, and output on
pin 21. A resistor should be connected between the emit-
ter-follower output and ground to ensure adequate output
drive capability. The resistor should be
≥
2.7k
(V
CC
=
12V) or
≥
2.2k
(V
CC
= 9V). A buffer transistor should be
used if the signal is taken off-board.
Equalization amplifier design
The equalization amplifier has an external series resonant
circuit, shown in Figure 24, which controls the frequency
characteristic. The output voltage, V
o
, is given by the fol-
lowing equation:
V
o
= (R1/Z + 1) (V
i
+ V
in
)
Since the input voltage, V
in
, is small, the gain is given
approximately by the following equation:
A
V
= V
o
/V
i
= R1/Z + 1
The amplifier can be used as a voltage amplifier by con-
necting a network to pin 20 as shown in Figure 25. The
bleeder resistor should be chosen to avoid excessive gain
and extreme video sync tip voltages.
Figure 24. Equalization amplifier
Figure 25. Voltage amplifier configuration
External bleeder resistor selection
If the equalization amplifier is configured for non-unity
gain, bleeder resistors R2 and R3, shown in Figure 26, are
required to ensure that the output DC voltage does not
change.
The sync tip voltage does not change if V
X
is approxi-
mately equal to V
21
. V
X
is given by the following equa-
tion:
V
X
= V
CC
×
R2/(R2 + R3)
The voltage gain is given by:
A
V
= 1 + 1000/Z1
where
Z1 = R2
×
R3/(R2 + R3)
and resistors R2 and R3 are given by:
R2 = 1000
×
V
CC
/[(V
CC
V
X
)
×
(A
V
1)]
R3 = 1000
×
V
CC
/[V
X
×
(A
V
1)]
Figure 26. External bleeder resistor circuit
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