參數(shù)資料
型號(hào): LA73033M
廠商: Sanyo Electric Co.,Ltd.
英文描述: Monolithic Linear IC I2C bus control (excluding standby control and RGB through control)
中文描述: 單片線性集成電路I2C總線控制(不包括備用的控制,并通過控制的RGB)
文件頁數(shù): 14/24頁
文件大?。?/td> 276K
代理商: LA73033M
LA73033M
No.A0646-14/24
Continued from preceding page.
Pin
name
Pin No.
I/0
Impe
dance
DC voltage
Pin Explanation
Input/Output form
72
VCC (B)
VCC for pin 73 input
74
VCC (Y)
VCC for input of pins 1, 79, 77, and 75
8
VCC (C)
VCC for input of pins 9, 7, 5, and 3
10
VCC
(SY)
VCC
(CV)
GND
(SY)
GND
(CV)
GND (C)
VCC for input of pins 11, 13, 15, 17, 19, and 21
12
P
5V
Description of
each pin
VCC on the input SW. To avoid
crosstalk, it is recommended to
insert a capacitor between each
VCC and GND. Keep VCC
always ON.
VCC for SYNC-SEP, clamp pulse
14
GND for pin 73 input
22
GND for input of pins 1, 79, 77, and 75
24
GND for input of pins 9, 7, 5, and 3
26
GND (Y)
GND for pins 11, 13, 15, 17, 19, and 21
28
GND (B)
P
0V
Description of
each pin
GND on the input SW side
GND for SYNC-SEP, clamp pulse
76
NC
78
NC
80
NC
2
NC
4
NC
6
NC
16
NC
0V
NC pins on the input SW side. It is
recommended to connect this to
GND on the substrate to avoid
interference between input
signals.
32
SDATA
33
SCLK
I
734M
Ω
Hi : 5V
Lo : V
Pin to enter the serial data and its
clock for IIC bus. For the input
waveform, refer to the SDA & SCL
standard.
IN
500
Ω
VCC
25
μ
A
39
CV.IN
43
Y1.IN
45
Y2.IN
R.IN
I
Clamp
Form
2.2V at 6dB
2.3V at 9dB
1.85V at no signal
Recommended capacitor = 0.1
μ
F.
For the signal with input, feedback
clamp is applied to the input
so that the clamp voltage
becomes constant. For signal
without input, diode clamp is
applied to the input. Pins
39 and 45 drop to 0 to 1V
when not selected.
200
Ω
VCC
VCC
100
μ
F
100k
Ω
19k
Ω
IN
VCC
VCC
Continued on next page.
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