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參數(shù)資料
| 型號(hào)： | LA7191N |
| 廠商： | Sanyo Electric Co.,Ltd. |
| 英文描述： | Global VHS-format VCR Video Signal Processor |
| 中文描述： | 全球錄影帶格式錄像機(jī)視頻信號(hào)處理器 |
| 文件頁數(shù)： | 7/11頁 |
| 文件大?。?/td> | 146K |
| 代理商： | LA7191N |
Continued from preceding page.
Parameter
Symbol
I
SLD1
Input
Output
T39A
T4A
Conditions
min
typ
135
max
Unit
μA
SLD detection current
T23A In PB mode, with S24: 3 and S23: off, input a
4 MHz 300 mVp-p continuous wave from
T39A, input a 50% white signal from T4A,
and measure the wave peak at T23A
I
SLD1
= VOS1/1 k
I
SLD2
T39A
T4A
T23A Same as above (however, S24 = 1)
I
SLD2
= VOS2/1 k
135
μA
2fsc output level
V2fsc
T21
In PB mode, measure the T21 output level
with an FET probe
480
640
800
mVp-p
Note) A trap (4.84 MHz for NTSC systems and 5.69 MHz for PAL systems) is required in the chroma playback system (between
pins 25 and 27 or between pins 31 and 29) in order to suppress unnecessary components in converter output.
LA7191N
No. 5471 - 7/11
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