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參數(shù)資料
| 型號： | L9215A |
| 廠商： | Lineage Power |
| 英文描述： | Short-Loop Sine Wave Ringing SLIC(短環(huán)路正弦波振鈴用戶接口（SLIC）) |
| 中文描述： | 短回路正弦波振鈴用戶接口（短環(huán)路正弦波振鈴用戶接口電路（SLIC）） |
| 文件頁數(shù)： | 39/46頁 |
| 文件大?。?/td> | 1165K |
| 代理商： | L9215A |
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Advance Data Sheet
October 2000
Short-Loop Sine Wave Ringing SLIC
L9215A/G
Lucent Technologies Inc.
39
ac Applications
(continued)
Design Examples
(continued)
Receive Gain
Ratios of R
RCV
, R
T3
, R
GP
will set both the low-frequency
termination and receive gain for the complex case. In
the complex case, additional high-frequency compen-
sation, via C
N
, R
N1
, and R
N2
, is needed for the return
loss characteristic. For resistive termination, C
N
, R
N1
,
and R
N2
are not used and RCVN is tied to ground via a
resistor.
Determine the receive gain, g
RCV
, taking into account
the impedance transformation in a manner similar to
transmit gain.
R
X
(dB) = R
X (specified[dB])
+ 20log
R
X
(dB) = 20log g
RCV
Then:
g
RCV
=
and low-frequency termination
Z
TER(low)
=
+ 2R
P
+ 50
Z
TER(low)
is the specified termination impedance assum-
ing low frequency (C or C
′ is open).
R
P
is the series protection resistor.
50
is the typical internal feed resistance.
These two equations are best solved using a computer
spreadsheet.
Next, solve for the high-frequency return loss compen-
sation circuit, C
N
, R
N1
, and R
N2
:
C
N
R
N2
=
C
G
R
TGP
R
N1
= R
N2
There is an input offset voltage associated with nodes
RCVN and RCVP. To minimize the effect of mismatch
of this voltage at T/R, the equivalent resistance to ac
ground at RCVN should be approximately equal to that
at RCVP. Refer to Figure 25 (with dc blocking capaci-
tors). To meet this requirement, R
N2
= R
GP
|| R
T3
.
Hybrid Balance
Set the hybrid cancellation via R
HB
.
R
HB
=
If a 5 V only codec such as the Lucent T7504 is used,
dc blocking capacitors must be added as shown in
Figure 25. This is because the codec is referenced to
2.5 V and the SLIC to ground—with the ac coupling, a
dc bias at T/R is eliminated and power associated with
this bias is not consumed.
Typically, values of 0.1 μF to 0.47 μF capacitors are
used for dc blocking. The addition of blocking capaci-
tors will cause a shift in the return loss and hybrid bal-
ance frequency response toward higher frequencies,
degrading the lower-frequency response. The lower
the value of the blocking capacitor, the more pro-
nounced the effect is, but the cost of the capacitor is
lower. It may be necessary to scale resistor values
higher to compensate for the low-frequency response.
This effect is best evaluated via simulation. A
PSPICE
*
model for the L9215 is available.
Design equation calculations seldom yield standard
component values. Conversion from the calculated
value to standard value may have an effect on the ac
parameters. This effect should be evaluated and opti-
mized via simulation.
* PSPICEis a registered trademark of MicroSim Corporation.
EQ
600
R
1
R
T3
---------------
R
GP
---------------
+
+
-----------------------------------------------
R
GP
1
-----------
R
RCV
---------------
+
+
--------------------------------------------
P
2400
2R
2400
2R
P
-------------------------
TGS
R
TGP
1
–
g
RCV
g
TX
×
------------------------------
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