參數(shù)資料
型號： L8560
廠商： Lineage Power
英文描述： Low-Power SLIC（electronic subscriber loop interface circuits ） with Ringing(帶振鈴的低功耗用戶線接口（SLIC）)
中文描述： 低功耗用戶接口（電子用戶環(huán)路接口電路）與振鈴（帶振鈴的低功耗用戶線接口電路（SLIC））
文件頁數(shù)： 29/46頁
文件大?。?/td> 1060K
代理商： L8560
Lucent Technologies Inc.
29
Data Sheet
April 2000
L8560 Low-Power SLIC with Ringing
Applications
(continued)
Power Ringing
(continued)
Current-Limit Switch
During nonringing modes, the internal current source is
set at 75
μ
A. During the ring mode, the current limit is
automatically increased by a factor of 2.8. This is done
to provide sufficient ring to a true North American 5
REN load. This is done internally by increasing the
value of I
PROG
from 75
μ
A to 210
μ
A, thus:
I
PROG
R
PROG
= l
LIM
B
DCOUT
R
PROG
= l
LIM
B
DCOUT
/I
PROG
R
PROG
(K) = l
LIM
(mA)
0.04167 (V/mA)/210e–3 (mA)
R
PROG
(K) = 0.198
l
LIM
(mA)
In the current-limit region, the dc template has a high
resistance (12.5 k
).
Ring Trip
Ring trip is accomplished by filtering the voltage seen
at node DCOUT and applying it to the integrated ring
trip comparator. DCOUT is a voltage proportional to the
tip/ring current, and under short dc loop conditions, on-
hook ringing current and off-hook current provide suffi-
cient voltage differential at DCOUT to distinguish that a
ring trip condition has occurred. The ring trip compara-
tor threshold is set via a resistor between the ring trip
comparator and ground.
Output NSTAT is automatically set to detect ring trip
during the balanced ring mode. During quiet intervals
of ringing, output NSTAT is automatically determined
by the loop closure detector.
The equivalent ring trip circuit for the balanced ringing
SLIC application is shown in Figure 31.
The equations governing ring trip are derived below.
Capacitors C
2
and C
4
, in conjunction with resistors R
2
and R
4
, form a double-pole, low-pass filter that
smooths the voltage seen at DCOUT. The poles of the
filters are determined by C
2
and C
4
. Where these poles
are set will influence both the ripple seen at DCOUT
and the speed of the transition of the voltage at
DCOUT from the pretrip to the tripped level. For the
derivation of the ring trip threshold equations, capaci-
tors C
2
and C
4
can be ignored.
Redrawing the circuit, ignoring the capacitors, and tak-
ing the Thevenin equivalent circuit of the network at
RTSN gives the results shown below in Figure 32.
12-3349.b (F)
Figure 31. Equivalent Ring Trip Circuit for Balanced Ringing SLIC
12-3348.b (F)
Figure 32. Thevenin Equivalent Ring Trip Circuit for Balanced Ringing SLIC
–
+
15 k
8.2 V
I
P
= I
N
R
2
NRDET
R
TSP
I
N
R
TSN
NSTAT
NLC
R
4
R
1
DCOUT
C
2
R
3
C
4
–
+
15 k
8.2 V
I
P
= I
N
R
2
NRDET
R
TSP
I
N
R
TSN
NSTAT
NLC
R
4
R
1
R
3
/(R
1
+ R
3
)
(R
3
/[R
1
+ R
3
]) DCOUT
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