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參數(shù)資料
| 型號(hào)： | L7582 |
| 廠商： | Lineage Power |
| 英文描述： | Ring Access Switch(振鈴存取開關(guān)) |
| 中文描述： | 環(huán)接入交換機(jī)（振鈴存取開關(guān)） |
| 文件頁數(shù)： | 13/16頁 |
| 文件大?。?/td> | 329K |
| 代理商： | L7582 |
Data Sheet
November 1999
Lucent Technologies Inc.
13
L7582 Tip Ring Access Switch
Application
12-2366.c (F)
Figure 7. Typical TRAS Application, Idle, or Talk State Shown
Table 13. Truth Table
1. If T
SD
= 5 V, the thermal shutdown mechanism is disabled. If T
SD
is floating, the thermal shutdown mechanism is active.
2. Forcing T
SD
to ground overrides the logic input pins and forces an all OFF state.
3. Idle/Talk state.
4. Power ringing state.
5. Test out or message waiting state.
6. All OFF state.
Input
Access
T
SD
Tip
Break
Switch
On
Off
Off
Off
Off
Ring
Break
Switch
On
Off
Off
Off
Off
Ringing
Return
Switch
Off
On
Off
Off
Off
Ring
Switch
Tip
Access
Switch
Off
Off
On
Off
Off
Ring
Access
Switch
Off
3
Off
4
On
5
Off
6
Off
6
0 V
5 V
0 V
5 V
0 V
0 V
5 V
5 V
5 V/Float
1
5 V/Float
1
5 V/Float
1
5 V/Float
1
0 V
2
Off
On
Off
Off
Off
Don’t Care
Don’t Care
R2
TIP
TIP
RING
BATTERY
FEED
RING
GENERATOR
BATTERY
SW1 BREAK
SW5
LINE
TEST
ACCESS
SW3
RINGING
RETURN
SW2 BREAK
SW6
LINE
TEST
ACCESS
SW4
RINGING
ACCESS
R1
CROWBAR
PROTECTION
SCR
AND
TRIP
CKT
V
BAT
REFERENCE
RING
A parallel in/parallel out data latch is integrated into the
L7582. Operation of the data latch is controlled by the
logic level input pin LATCH. The data input to the latch
is the IN
RING
and IN
ACCESS
pins of the L7582, and the
output of the data latch is an internal node used for
state control.
When the LATCH control pin is at logic 0, the data latch
is transparent and data control signals flow directly
from IN
RING
and IN
ACCESS
, through the data latch to
state control. Any changes in IN
RING
and IN
ACCESS
will
be reflected in the state of the switches.
When the LATCH control pin is at logic 1, the data latch
is active—the L7582 will no longer react to changes at
the IN
RING
and IN
ACCESS
control pins. The state of the
switches is now latched; that is, the state of the
switches will remain as they were when the LATCH
input transitioned from logic 0 to logic 1. The switches
will not respond to changes in IN
RING
and IN
ACCESS
as
long as LATCH is held high.
Note that the T
SD
input is not tied to the data latch. T
SD
is not affected by the LATCH input. T
SD
input will over-
ride state control via IN
RING
, IN
ACCESS
, and LATCH.
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