參數(shù)資料
型號(hào): L6574D
廠商: 意法半導(dǎo)體
英文描述: CFL/TL BALLAST DRIVER PREHEAT AND DIMMING
中文描述: 節(jié)能燈/商標(biāo)法鎮(zhèn)流器和調(diào)光驅(qū)動(dòng)預(yù)熱
文件頁(yè)數(shù): 2/10頁(yè)
文件大?。?/td> 161K
代理商: L6574D
L6574
2/10
PIN CONNECTION
(top view)
THERMAL DATA
Symbol
Parameter
DIP16
SO16N
Unit
R
th j-amb
Thermal Resistance Junction to ambient
Max.
80
120
°C/W
PIN DESCRIPTION
1
Pin
CPRE
Function
Preheat Timing Capacitor. The capacitor C
PRE
sets the preheating and the frequency shift time,
according to the relations: t
PRE
= K
PRE
· C
PRE
and t
SH
= K
FS
· C
PRE
(typ. K
PRE
= 1.5s/
μ
F, K
FS
=
0.15s/
μ
F). This feature is obtained by charging CPRE with two different currents. During tPRE
this current is independent of the external components, so CPRE is charged up to 3.5V (preheat
timing comparator threshold). During t
SH
the current depends on R
PRE
value (i.e. on the differ-
ence between f
PRE
and f
IGN
). In this way t
SH
is always set at 0.1t
PRE
. In steady state the voltage
at pin 1 is 5V.
Maximum Oscillation Frequency Setting. The resistance connected between this pin and ground
sets the fPRE value, fixing the difference between f
PRE
and f
IGN
(f
PRE
> f
IGN
). At the end of the
Start-up procedure, the effect current drown from R
PRE
is over. The voltage at this pin is fixed at
V
REF
=2V.
Oscillator Frequency Setting. The capacitor C
F
, along with to R
PRE
and R
IGN
, sets f
PRE
and f
ING
.
In normal operation this pin shows a triangular wave.
Minimum Oscillation Frequency Setting. The resistance connected between this pin and ground
sets the f
IGN
value. The voltage at this pin is fixed at V
REF
=2V.
Out of the operational amplifier. To implement a feedback control loop this pin can be connected
to the RIGN pin by means an appropriate circuitry.
Inverting Input of the operational amplifier.
Non Inverting Input of the operational amplifier.
Enable 1. This pin (active high), forces the device in a latched shutdown state (like in the under
voltage conditions). There are two ways to resume normal operation:
– the first is to reduce the supply voltage below the undervoltage threshold and then
increase it again until the valid supply is recognised.
– the second is activating EN2 input.
The enable 1 is especially designed for strong fault (e.g. in case of lamp disconnection).
2
RPRE
3
CF
4
RIGN
5
OPout
6
7
8
OPin-
OPin+
EN1
CPRE
RPRE
CF
RING
OPOUT
OPIN+
OPIN-
1
3
2
4
5
6
7
GND
V
S
LVG
N.C.
OUT
HVG
VBOOT
16
15
14
13
12
10
11
D97IN492
EN1
8
EN2
9
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