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參數(shù)資料
| 型號： | L6254 |
| 廠商： | STMICROELECTRONICS |
| 元件分類： | 運(yùn)動控制電子 |
| 英文描述： | DISK DRIVE MOTOR CONTROLLER, 2.1 A, PQFP44 |
| 封裝： | 10 X 10 MM, TQFP-44 |
| 文件頁數(shù)： | 11/17頁 |
| 文件大?。?/td> | 170K |
| 代理商： | L6254 |
PIN DESCRIPTION (Pin Types: D = Digital, P = Power, A = Analog)
N.
Name
Function
1
FCOM
Output of the Spindle zero cross or Current Sense circuit.
2
CTAP
Spindle Central Tap used for differential BEMF sensing.
3
PWM/SLEW
RC network sets the Spindle Linear Slew Rate and PWM OFF-Time.
4
OUT_C
Spindle DMOS Half Bridge Output and Input C for BEMF sensing.
5
I_SENSE
Input to sense the voltage the SPINDLE Sense Resistor.
6
R_SENSE
Output connection for the Motor Current Sense Resistor to ground.
7
OUT_B
Spindle DMOS Half Bridge Output and Input B for BEMF sensing.
8
GND
Spindle Ground (Substrate).
9
R_SENSE
Output connection for the Motor Current Sense Resistor to ground.
10
OUT_A
Spindle DMOS Half Bridge Output and Input A for BEMF sensing.
11
INDEX
Input to allow Spindle to be locked to Index (servo) pulse.
12
BRK_CAP
Storage Capacitor for brake circuit. typically 5.9V.
13
VCC
+12V Power Supply for Spindle Power section.
14
DGND
Digital Ground.
15
SYS_CLK
Clock Frequency for system timers and counters.
16
SDEN
Serial Data Enable. Active high input pin for the serial port enable.
17
SDATA
Serial Port Data. Input/Output pin for serial data, 8bits of instruction/address followed by 8
bits of data. Open pin is at logic low as an input.
18
SCLK
Serial Port Data Clock. Positive edge triggered clock input for the serial data.
19
VDD
Digital/Analog power supply. +5V nominally.
20
V12/2
Reference Output for VCM control loop. Typically, half of the VCC except when parking.
21
FLL_FILTER
Speed loop R/C compensation connection used for FLL mode operation.
22
VCM_CAL
VCM loop offset voltage used for calibration.
23
CP
External Main Charge Pump Capacitor, Typically, Vz+Vcc is about 17.8V
24
CS
External Charge Pump Capacitor.
25
VCC
+12V Power Supply for VCM Power section.
26
VCM_A-
VCM Power Amplifier negative output terminal.
27
SENSE_IN+
Non inverting Input of the Sense Amplifier for VCM block.
28
VCM_GND
Ground for VCM Power section.
29
SENSE_IN-
Inverting Input of the Sense Amplifier for VCM block.
30
VCM_A+
VCM Power Amplifier positive output terminal.
31
VCC
+12V Power Supply for VCM Power section.
32
FLL_RES
Resistor for setting accurate bias current sources for the chip (62K required).
33
SW1
External ISOFET driver.
34
PORB
Power on Reset Output. Low signal indicates the failure of the supplies.
35
TR_5V
Set Point Input for 5V Supply Monitor ( 2V threshold, 100mV Hysteresis)
36
POR_DELAY
Capacitor connection to set the Power on Reset Delay (3V threshold, 2
A charging)
37
SENSE_OUT
Output of the Sense Amplifier.
38
ERROR_OUT
Output of the Error Amplifier.
39
ERROR_IN
Inverting Input of the Error Amplifier.
40
TR_12V
Set Point Input for 12V Supply Monitor (2V threshold, 100mV Hysteresis)
41
DAC
Output of the VCM DAC.
42
AGND
Analog Ground. For bang gap voltage reference.
43
VCC
+12V Power Supply for Spindle Power section.
44
SPN_COMP
External RC network that defines the compensation of the Spindle Transconductance Loop
in Linear Mode.
L6254
3/17
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