參數(shù)資料
型號: L6207
廠商: 意法半導(dǎo)體
英文描述: DMOS DUAL FULL BRIDGE DRIVER WITH PWM CURRENT CONTROLLER
中文描述: 偶的DMOS全橋驅(qū)動器,帶有PWM電流控制器
文件頁數(shù): 16/23頁
文件大?。?/td> 387K
代理商: L6207
L6207
16/23
APPLICATION INFORMATION
A typical application using L6207 is shown in Fig. 16. Typical component values for the application are shown
in Table 3. A high quality ceramic capacitor in the range of 100 to 200 nF should be placed between the power
pins (VS
A
and VS
B
) and ground near the L6207 to improve the high frequency filtering on the power supply and
reduce high frequency transients generated by the switching. The capacitors connected from the EN
A
and EN
B
inputs to ground set the shut down time for the BrgidgeA and BridgeB respectively when an over current is de-
tected (see Overcurrent Protection). The two current sensing inputs (SENSE
A
and SENSE
B
) should be connect-
ed to the sensing resistors with a trace length as short as possible in the layout. The sense resistors should be
non-inductive resistors to minimize the di/dt transients across the resistor. To increase noise immunity, unused
logic pins (except EN
A
and EN
B
) are best connected to 5V (High Logic Level) or GND (Low Logic Level) (see
pin description). It is recommended to keep Power Ground and Signal Ground separated on PCB.
Table 2. Component Values for Typical Application
Figure 16. Typical Application
C
1
100uF
D
1
1N4148
C
2
100nF
D
2
1N4148
C
A
1nF
R
A
39K
C
B
1nF
R
B
39K
C
BOOT
220nF
R
ENA
100K
C
P
10nF
R
ENB
100K
C
ENA
5.6nF
R
P
100
C
ENB
5.6nF
R
SENSEA
0.3
C
REFA
68nF
R
SENSEB
0.3
C
REFB
68nF
OUT1
A
OUT2
A
LOAD
A
LOAD
B
VREF
A
VREF
B
1
5
21
18
19
8
16
GND
GND
GND
GND
RC
A
OUT2
B
OUT1
B
VS
A
VS
B
POWER
GROUND
-
SIGNAL
GROUND
+
VS
8-52V
DC
24
VCP
VBOOT
C
P
C
BOOT
R
P
D
2
D
1
C
1
C
2
SENSE
A
R
SENSEA
20
IN1
A
IN2
A
IN1
A
IN2
A
2
6
7
13
EN
A
EN
B
C
ENB
R
ENB
R
ENA
EN
A
EN
B
V
REFA
= 0-1V
V
REFB
= 0-1V
23
IN2
B
12
IN1
B
IN2
B
IN1
B
11
14
4
17
3
15
22
SENSE
B
R
SENSEB
C
A
R
A
C
B
10
C
REFA
C
REFB
C
ENA
RC
B
9
R
B
D02IN1343
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