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參數(shù)資料
| 型號(hào)： | KSZ9021RNI |
| 廠商： | Micrel Inc |
| 文件頁(yè)數(shù)： | 33/58頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC TXRX 10/100/1000 SGL 48QFN |
| 標(biāo)準(zhǔn)包裝： | 260 |
| 類型： | 收發(fā)器 |
| 驅(qū)動(dòng)器/接收器數(shù)： | 8/8 |
| 規(guī)程： | 千兆位以太網(wǎng) |
| 電源電壓： | 3.135 V ~ 3.465 V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 48-VFQFN 裸露焊盤 |
| 供應(yīng)商設(shè)備封裝： | 48-QFN（7x7） |
| 包裝： | 托盤 |
| 配用： | 576-3874-ND - BOARD EVALUATION FOR KSZ9021RN |
| 其它名稱： | 576-3978 KSZ9021RNI-ND |
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2010 Microchip Technology Inc.
DS22265A-page 39
MCP444X/446X
3.0
PIN DESCRIPTIONS
The descriptions of the pins are listed in Table 3-1.
Additional descriptions of the device pins follows.
TABLE 3-1:
PINOUT DESCRIPTION FOR THE MCP444X/446X
Pin
Weak
Pull-up/
down
Standard Function
TSSOP
QFN
Symbol
I/O
Buffer
Type
14L
20L
—1
19
P3A
A
Analog
No
Potentiometer 3 Terminal A
12
20
P3W
A
Analog
No
Potentiometer 3 Wiper Terminal
23
1
P3B
A
Analog
No
Potentiometer 3 Terminal B
34
2
HVC/A0
I
HV w/ST
“smart” High Voltage Command / I2C Address 0
45
3
SCL
I
HV w/ST
No
I2C Clock Input
56
4
SDA
I
HV w/ST
No
I2C Serial Data I/O. Open Drain output
67
5
VSS
—P
—
Ground
78
6
P1B
A
Analog
No
Potentiometer 1 Terminal B
89
7
P1W
A
Analog
No
Potentiometer 1 Wiper Terminal
—10
8
P1A
A
Analog
No
Potentiometer 1 Terminal A
—11
9
P0A
A
Analog
No
Potentiometer 0 Terminal A
912
10
P0W
A
Analog
No
Potentiometer 0 Wiper Terminal
10
13
11
P0B
A
Analog
No
Potentiometer 0 Terminal B
—14
12
WP
I
HV w/ST
“smart” Hardware EEPROM Write Protect
—15
13
RESET
I
HV w/ST
Yes
Hardware Reset Pin
11
16
14
A1
I
HV w/ST
“smart” I2C Address 1
12
17
15
VDD
—P
—
Positive Power Supply Input
13
18
16
P2B
A
Analog
No
Potentiometer 2 Terminal B
14
19
17
P2W
A
Analog
No
Potentiometer 2 Wiper Terminal
—20
18
P2A
A
Analog
No
Potentiometer 2 Terminal A
——
21
EP
—
Exposed Pad. (Note 2)
Legend:
HV w/ST = High Voltage tolerant input (with Schmidtt trigger input)
A = Analog pins (Potentiometer terminals)
I = digital input (high Z)
O = digital output
I/O = Input / Output
P = Power
Note 1:
The pin’s “smart” pull-up shuts off while the pin is forced low. This is done to reduce the standby and
shut-down current.
2:
The QFN package has a contact on the bottom of the package. This contact is conductively connected to
the die substrate, and therefore should be unconnected or connected to the same ground as the device’s
VSS pin.
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