參數(shù)資料
型號: KSZ9021GN
廠商: Micrel Inc
文件頁數(shù): 24/53頁
文件大小: 0K
描述: TXRX ETHERNET GB GMII/MII 64-MLF
標(biāo)準(zhǔn)包裝: 348
類型: 收發(fā)器
驅(qū)動器/接收器數(shù): 8/8
規(guī)程: 千兆位以太網(wǎng)
電源電壓: 3.135 V ~ 3.465 V
安裝類型: 表面貼裝
封裝/外殼: 64-VFQFN 裸露焊盤
供應(yīng)商設(shè)備封裝: 64-QFN(8x8)
包裝: 托盤
配用: 576-3873-ND - BOARD EVALUATION FOR KSZ9021GN
其它名稱: 576-3635
KSZ9021GN-ND
MCP434X/436X
DS22233A-page 30
2009 Microchip Technology Inc.
3.1
Chip Select (CS)
The CS pin is the serial interface’s chip select input.
Forcing the CS pin to VIL enables the serial commands.
Forcing the CS pin to VIHH enables the high-voltage
serial commands.
3.2
Serial Data In (SDI)
The SDI pin is the serial interfaces Serial Data In pin.
This pin is connected to the Host Controllers SDO pin.
3.3
Ground (VSS)
The VSS pin is the device ground reference.
3.4
Potentiometer Terminal B
The terminal B pin is connected to the internal
potentiometer’s terminal B.
The potentiometer’s terminal B is the fixed connection
to
the
Zero
Scale
wiper
value
of
the
digital
potentiometer. This corresponds to a wiper value of
0x00 for both 7-bit and 8-bit devices.
The terminal B pin does not have a polarity relative to
the terminal W or A pins. The terminal B pin can
support both positive and negative current. The voltage
on terminal B must be between VSS and VDD.
MCP43XX devices have four terminal B pins, one for
each resistor network.
3.5
Potentiometer Wiper (W) Terminal
The terminal W pin is connected to the internal
potentiometer’s terminal W (the wiper). The wiper
terminal is the adjustable terminal of the digital
potentiometer. The terminal W pin does not have a
polarity relative to terminals A or B pins. The terminal
W pin can support both positive and negative current.
The voltage on terminal W must be between VSS and
VDD.
MCP43XX devices have four terminal W pins, one for
each resistor network.
3.6
Potentiometer Terminal A
The terminal A pin is available on the MCP43X1
devices,
and
is
connected
to
the
internal
potentiometer’s terminal A.
The potentiometer’s terminal A is the fixed connection
to
the
Full
Scale
wiper
value
of
the
digital
potentiometer. This corresponds to a wiper value of
0x100 for 8-bit devices or 0x80 for 7-bit devices.
The terminal A pin does not have a polarity relative to
the terminal W or B pins. The terminal A pin can
support both positive and negative current. The voltage
on terminal A must be between VSS and VDD.
The terminal A pin is not available on the MCP43X2
devices, and the internally terminal A signal is floating.
MCP43X1 devices have four terminal A pins, one for
each resistor network.
3.7
Write Protect (WP)
The WP pin is used to force the non-volatile memory to
be write protected.
3.8
Reset (RESET)
The RESET pin is used to force the device into the
POR/BOR state.
3.9
Serial Data Out (SDO)
The SDO pin is the serial interfaces Serial Data Out pin.
This pin is connected to the Host Controllers SDI pin.
This pin allows the Host Controller to read the digital
potentiometers registers, or monitor the state of the
command error bit.
3.10
Positive Power Supply Input (VDD)
The VDD pin is the device’s positive power supply input.
The input power supply is relative to VSS.
While the device VDD < Vmin (2.7V), the electrical
performance of the device may not meet the data sheet
specifications.
3.11
Exposed Pad (EP)
This pad is conductively connected to the device's
substrate. This pad should be tied to the same potential
as the VSS pin (or left unconnected). This pad could be
used to assist as a heat sink for the device when
connected to a PCB heat sink.
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