參數(shù)資料
型號： KSZ8841-16MQL A6
廠商： Micrel Inc
文件頁數(shù)： 51/105頁
文件大小： 0K
描述： IC MAC CTRLR 8/16BIT 128-PQFP
標(biāo)準(zhǔn)包裝： 66
控制器類型： 以太網(wǎng)控制器，MAC
接口： 總線
電源電壓： 3.1 V ~ 3.5 V
工作溫度： 0°C ~ 70°C
安裝類型： 表面貼裝
封裝/外殼： 128-BFQFP
供應(yīng)商設(shè)備封裝： 128-PQFP（14x20）
包裝： 托盤
配用： 576-1631-ND - BOARD EVALUATION KSZ8841-16MQL
Micrel, Inc.
KSZ8841-16/32 MQL/MVL/MBL
October 2007
5
M9999-102207-1.6
Receive Queue (RXQ) Frame Format........................................................................................................................................ 39
EEPROM Interface ....................................................................................................................................................... 40
Loopback Support ........................................................................................................................................................ 42
Near-end (Remote) Loopback.................................................................................................................................................... 42
CPU Interface I/O Registers ............................................................................................................................................... 43
I/O Registers .............................................................................................................................................................................. 43
Internal I/O Space Mapping ....................................................................................................................................................... 44
Register Map: MAC and PHY ............................................................................................................................................. 52
Bit Type Definition ........................................................................................................................................................ 52
Bank 0-63 Bank Select Register (0x0E): BSR (same location in all Banks) ................................................................ 52
Bank 0 Base Address Register (0x00): BAR................................................................................................................ 52
Bank 0 QMU RX Flow Control High Watermark Configuration Register (0x04): QRFCR ........................................... 53
Bank 0 Bus Error Status Register (0x06): BESR ......................................................................................................... 53
Bank 0 Bus Burst Length Register (0x08): BBLR......................................................................................................... 53
Bank 1: Reserved ......................................................................................................................................................... 53
Bank 2 Host MAC Address Register Low (0x00): MARL ............................................................................................. 54
Bank 2 Host MAC Address Register Middle (0x02): MARM ........................................................................................ 54
Bank 2 Host MAC Address Register High (0x04): MARH ............................................................................................ 54
Bank 3 On-Chip Bus Control Register (0x00): OBCR .................................................................................................. 55
Bank 3 EEPROM Control Register (0x02): EEPCR ..................................................................................................... 55
Bank 3 Memory BIST Info Register (0x04): MBIR........................................................................................................ 56
Bank 3 Global Reset Register (0x06): GRR ................................................................................................................. 56
Bank 3 Power Management Capabilities Register (0x08): PMCR ............................................................................... 56
Bank 3 Wakeup Frame Control Register (0x0A): WFCR ............................................................................................. 57
Bank 4 Wakeup Frame 0 CRC0 Register (0x00): WF0CRC0...................................................................................... 58
Bank 4 Wakeup Frame 0 CRC1 Register (0x02): WF0CRC1...................................................................................... 58
Bank 4 Wakeup Frame 0 Byte Mask 0 Register (0x04): WF0BM0 .............................................................................. 58
Bank 4 Wakeup Frame 0 Byte Mask 1 Register (0x06): WF0BM1 .............................................................................. 58
Bank 4 Wakeup Frame 0 Byte Mask 2 Register (0x08): WF0BM2 .............................................................................. 58
Bank 4 Wakeup Frame 0 Byte Mask 3 Register (0x0A): WF0BM3.............................................................................. 59
Bank 5 Wakeup Frame 1 CRC0 Register (0x00): WF1CRC0...................................................................................... 59
Bank 5 Wakeup Frame 1 CRC1 Register (0x02): WF1CRC1...................................................................................... 59
Bank 5 Wakeup Frame 1 Byte Mask 0 Register (0x04): WF1BM0 .............................................................................. 59
Bank 5 Wakeup Frame 1 Byte Mask 1 Register (0x06): WF1BM1 .............................................................................. 59
Bank 5 Wakeup Frame 1 Byte Mask 2 Register (0x08): WF1BM2 .............................................................................. 60
Bank 5 Wakeup Frame 1 Byte Mask 3 Register (0x0A): WF1BM3.............................................................................. 60
Bank 6 Wakeup Frame 2 CRC0 Register (0x00): WF2CRC0...................................................................................... 60
Bank 6 Wakeup Frame 2 CRC1 Register (0x02): WF2CRC1...................................................................................... 60
Bank 6 Wakeup Frame 2 Byte Mask 0 Register (0x04): WF2BM0 .............................................................................. 60
Bank 6 Wakeup Frame 2 Byte Mask 1 Register (0x06): WF2BM1 .............................................................................. 61
Bank 6 Wakeup Frame 2 Byte Mask 2 Register (0x08): WF2BM2 .............................................................................. 61
Bank 6 Wakeup Frame 2 Byte Mask 3 Register (0x0A): WF2BM3.............................................................................. 61
Bank 7 Wakeup Frame 3 CRC0 Register (0x00): WF3CRC0...................................................................................... 61
Bank 7 Wakeup Frame 3 CRC1 Register (0x02): WF3CRC1...................................................................................... 61
Bank 7 Wakeup Frame 3 Byte Mask 0 Register (0x04): WF3BM0 .............................................................................. 62
Bank 7 Wakeup Frame 3 Byte Mask 1 Register (0x06): WF3BM1 .............................................................................. 62
Bank 7 Wakeup Frame 3 Byte Mask 2 Register (0x08): WF3BM2 .............................................................................. 62
Bank 7 Wakeup Frame 3 Byte Mask 3 Register (0x0A): WF3BM3.............................................................................. 62
Bank 8 – 15: Reserved ................................................................................................................................................. 62
Bank 16 Transmit Control Register (0x00): TXCR ....................................................................................................... 63
Bank 16 Transmit Status Register (0x02): TXSR......................................................................................................... 63
Bank 16 Receive Control Register (0x04): RXCR........................................................................................................ 64
Bank 16 TXQ Memory Information Register (0x08): TXMIR ........................................................................................ 64
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
KSZ8841-16MQL-EVAL 功能描述:以太網(wǎng)開發(fā)工具 KSZ8841-16MQL Evaluation Board RoHS:否 制造商:Micrel 產(chǎn)品:Evaluation Boards 類型:Ethernet Transceivers 工具用于評估:KSZ8873RLL 接口類型:RMII 工作電源電壓:
KSZ8841-16MVL 功能描述:以太網(wǎng) IC Single Ethernet Port + Generic (8, 16-bit) bus interface(Lead Free) RoHS:否 制造商:Micrel 產(chǎn)品:Ethernet Switches 收發(fā)器數(shù)量:2 數(shù)據(jù)速率:10 Mb/s, 100 Mb/s 電源電壓-最大:1.25 V, 3.45 V 電源電壓-最小:1.15 V, 3.15 V 最大工作溫度:+ 85 C 封裝 / 箱體:QFN-64 封裝:Tray
KSZ8841-16MVL TR 功能描述:以太網(wǎng) IC Single Ethernet Port + Generic (8, 16-bit) bus interface(Lead Free) RoHS:否 制造商:Micrel 產(chǎn)品:Ethernet Switches 收發(fā)器數(shù)量:2 數(shù)據(jù)速率:10 Mb/s, 100 Mb/s 電源電壓-最大:1.25 V, 3.45 V 電源電壓-最小:1.15 V, 3.15 V 最大工作溫度:+ 85 C 封裝 / 箱體:QFN-64 封裝:Tray
KSZ8841-16MVL-EVAL 功能描述:BOARD EVALUATION KSZ8841-16MVL RoHS:是 類別:編程器，開發(fā)系統(tǒng) >> 過時(shí)/停產(chǎn)零件編號 系列:- 標(biāo)準(zhǔn)包裝:1 系列:- 類型:MCU 適用于相關(guān)產(chǎn)品:Freescale MC68HC908LJ/LK（80-QFP ZIF 插口） 所含物品:面板、纜線、軟件、數(shù)據(jù)表和用戶手冊 其它名稱:520-1035
KSZ8841-16MVLI 功能描述:以太網(wǎng) IC Single Ethernet Port + Generic (8, 16-bit) bus interface(Lead Free) RoHS:否 制造商:Micrel 產(chǎn)品:Ethernet Switches 收發(fā)器數(shù)量:2 數(shù)據(jù)速率:10 Mb/s, 100 Mb/s 電源電壓-最大:1.25 V, 3.45 V 電源電壓-最小:1.15 V, 3.15 V 最大工作溫度:+ 85 C 封裝 / 箱體:QFN-64 封裝:Tray
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