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參數(shù)資料
| 型號： | KSZ8051MNL-EVAL |
| 廠商： | Micrel Inc |
| 文件頁數(shù)： | 22/59頁 |
| 文件大?。?/td> | 0K |
| 描述： | BOARD EVALUATION FOR KSZ8051MNL |
| 標準包裝： | 1 |
| 主要目的： | 接口，以太網(wǎng) PHY |
| 嵌入式： | 否 |
| 已用 IC / 零件： | KSZ8051MNL |
| 已供物品： | 板 |
| 相關產(chǎn)品： | 576-3845-ND - TXRX PHY 10/T100 3.3V 32QFN 576-3777-6-ND - TXRX PHY 10/T100 3.3V MII 32-QFN 576-3777-1-ND - TXRX PHY 10/T100 3.3V MII 32-QFN 576-3777-2-ND - TXRX PHY 10/T100 3.3V MII 32-QFN 576-3732-ND - TXRX PHY 10/T100 3.3V MII 32-QFN |
| 其它名稱： | 576-3865 |
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Micrel, Inc.
KSZ8051MNL/RNL
July 2010
29
M9999-070910-1.0
Interrupt (INTRP)
INTRP (pin 21) is an optional interrupt signal that is used to inform the external controller that there has been a status
update to the KSZ8051MNL/RNL PHY register. Register 1Bh, bits [15:8] are the interrupt control bits to enable and
disable the conditions for asserting the INTRP signal. Register 1Bh, bits [7:0] are the interrupt status bits to indicate which
interrupt conditions have occurred. The interrupt status bits are cleared after reading register 1Bh.
Register 1Fh, bit 9 sets the interrupt level to active high or active low. The default is active low.
The MII management bus option gives the MAC processor complete access to the KSZ8051MNL/RNL control and status
registers. Additionally, an interrupt pin eliminates the need for the processor to poll the PHY for status change.
HP Auto MDI/MDI-X
HP Auto MDI/MDI-X configuration eliminates the confusion of whether to use a straight cable or a crossover cable
between the KSZ8051MNL/RNL and its link partner. This feature allows the KSZ8051MNL/RNL to use either type of cable
to connect with a link partner that is in either MDI or MDI-X mode. The auto-sense function detects transmit and receive
pairs from the link partner, and then assigns transmit and receive pairs of the KSZ8051MNL/RNL accordingly.
HP Auto MDI/MDI-X is enabled by default. It is disabled by writing a one to register 1Fh, bit 13. MDI and MDI-X mode is
selected by register 1Fh, bit 14 if HP Auto MDI/MDI-X is disabled.
An isolation transformer with symmetrical transmit and receive data paths is recommended to support auto MDI/MDI-X.
The IEEE 802.3 Standard defines MDI and MDI-X as follows:
MDI
MDI-X
RJ-45 Pin
Signal
RJ-45 Pin
Signal
1
TX+
1
RX+
2
TX-
2
RX-
3
RX+
3
TX+
6
RX-
6
TX-
Table 6. MDI/MDI-X Pin Definition
Straight Cable
A straight cable connects a MDI device to a MDI-X device, or a MDI-X device to a MDI device. The following figure depicts
a typical straight cable connection between a NIC card (MDI) and a switch, or hub (MDI-X).
Figure 6. Typical Straight Cable Connection
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| KSZ8051MNLI | 功能描述:TXRX PHY 10/T100 3.3V 32QFN RoHS:是 類別:集成電路 (IC) >> 接口 - 驅動器，接收器，收發(fā)器 系列:- 標準包裝:1,140 系列:AU 類型:收發(fā)器 驅動器/接收器數(shù):1/1 規(guī)程:CAN 電源電壓:5.3 V ~ 27 V 安裝類型:表面貼裝 封裝/外殼:14-SOIC（0.154"，3.90mm 寬） 供應商設備封裝:14-SO 包裝:管件 其它名稱:935267940512AU5790D14AU5790D14-ND |
| KSZ8051MNLI TR | 功能描述:以太網(wǎng) IC 3.3V, 10Base-T/100Base-TX Physical Layer Transceiver with MII support (32-QFN, Industrial Grade) RoHS:否 制造商:Micrel 產(chǎn)品:Ethernet Switches 收發(fā)器數(shù)量:2 數(shù)據(jù)速率:10 Mb/s, 100 Mb/s 電源電壓-最大:1.25 V, 3.45 V 電源電壓-最小:1.15 V, 3.15 V 最大工作溫度:+ 85 C 封裝 / 箱體:QFN-64 封裝:Tray |
| KSZ8051MNLITR | 制造商:Micrel 功能描述:Ethernet TXRX PHY 10 T100 3.3V 32 QFN |
| KSZ8051MNLI-TR | 功能描述:1/1 Transceiver Full MII 32-QFN (5x5) 制造商:microchip technology 系列:- 包裝:剪切帶（CT） 零件狀態(tài):過期 類型:收發(fā)器 協(xié)議:MII 驅動器/接收器數(shù):1/1 雙工:全 接收器滯后:- 數(shù)據(jù)速率:- 電壓 - 電源:1.8V，2.5V，3.3V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:32-VFQFN 裸露焊盤 供應商器件封裝:32-QFN（5x5） 標準包裝:1 |
| KSZ8051MNL-TR | 功能描述:1/1 Transceiver Full MII 32-QFN (5x5) 制造商:microchip technology 系列:- 包裝:剪切帶（CT） 零件狀態(tài):過期 類型:收發(fā)器 協(xié)議:MII 驅動器/接收器數(shù):1/1 雙工:全 接收器滯后:- 數(shù)據(jù)速率:- 電壓 - 電源:1.8V，2.5V，3.3V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:32-VFQFN 裸露焊盤 供應商器件封裝:32-QFN（5x5） 標準包裝:1 |
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