參數(shù)資料
型號: KSZ8051MLL-EVAL
廠商: Micrel Inc
文件頁數(shù): 36/48頁
文件大小: 0K
描述: BOARD EVALUATION FOR KSZ8051MLL
標(biāo)準(zhǔn)包裝: 1
主要目的: 接口,以太網(wǎng) PHY
嵌入式:
已用 IC / 零件: KSZ8051MLL
已供物品:
相關(guān)產(chǎn)品: 576-3888-6-ND - TXRX PHY 10/T100 3.3V MII 48LQFP
576-3888-1-ND - TXRX PHY 10/T100 3.3V MII 48LQFP
576-3888-2-ND - TXRX PHY 10/T100 3.3V MII 48LQFP
KSZ8051MLL TR-ND - TXRX PHY 10/T100 3.3V MII 48LQFP
576-3731-ND - TXRX PHY 10/T100 3.3V MII 48LQFP
其它名稱: 576-3864
MCP413X/415X/423X/425X
DS22060B-page 44
2008 Microchip Technology Inc.
6.2
The SPI Modes
The SPI module supports two (of the four) standard SPI
modes. These are Mode 0,0 and 1,1. The mode is
determined by the state of the SDI pin on the rising
edge of the 1st clock bit (of the 8-bit byte).
6.2.1
MODE 0,0
In Mode 0,0: SCK idle state = low (VIL), data is clocked
in on the SDI pin on the rising edge of SCK and clocked
out on the SDO pin on the falling edge of SCK.
6.2.2
MODE 1,1
In Mode 1,1: SCK idle state = high (VIH), data is
clocked in on the SDI pin on the rising edge of SCK and
clocked out on the SDO pin on the falling edge of SCK.
6.3
SPI Waveforms
Figure 6-3 through Figure 6-8 show the different SPI
command waveforms. Figure 6-3 and Figure 6-4 are
read and write commands. Figure 6-5 and Figure 6-6
are read commands when the SDI and SDO pins are
multiplexed on the same pin (SDI/SDO). Figure 6-7
are
increment and decrement
commands.
FIGURE 6-3:
16-Bit Commands (Write, Read) - SPI Waveform (Mode 1,1).
FIGURE 6-4:
16-Bit Commands (Write, Read) - SPI Waveform (Mode 0,0).
CS
SCK
Write to
SSPBUF
SDI
Input
Sample
SDO
bit15 bit14 bit13 bit12 bit11 bit10 bit9
bit8
bit7
bit6
bit5
bit4
bit3
bit2
bit1
bit0
bit15 bit14 bit13 bit12
bit9
bit8
bit7
bit6
bit5
bit4
bit3
bit2
bit1
bit0
AD3 AD2 AD1
AD0
C1
C0
X
D8
D7
D6
D5
D4
D3
D2
D1
D0
VIH
VIL
CMDERR bit
VIHH (1)
Note 1: VIHH is supported for compability with the MCP414X/6X and MCP424X/6X devices high voltage
operation.
CS
SCK
Write to
SSPBUF
SDI
Input
Sample
SDO
bit15
bit14 bit13 bit12 bit11 bit10 bit9
bit8
bit7
bit6
bit5
bit4
bit3
bit2
bit1
bit0
bit15 bit14 bit13 bit12
bit9
bit8
bit7
bit6
bit5
bit4
bit3
bit2
bit1
bit0
AD3 AD2 AD1
AD0
C1
C0
X
D8
D7
D6
D5
D4
D3
D2
D1
D0
VIH
VIL
CMDERR bit
VIHH(1)
Note 1: VIHH is supported for compability with the MCP414X/6X and MCP424X/6X devices high voltage
operation.
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