參數(shù)資料
型號(hào)： KSZ8041TL TR
廠商： Micrel Inc
文件頁(yè)數(shù)： 17/58頁(yè)
文件大?。?/td> 0K
描述： TRANSCEIVER 10/100 48-TQFP
標(biāo)準(zhǔn)包裝： 1,000
類型： 收發(fā)器
驅(qū)動(dòng)器/接收器數(shù)： 1/1
規(guī)程： MII，RMII
電源電壓： 3.135 V ~ 3.465 V
安裝類型： 表面貼裝
封裝/外殼： 48-TQFP
供應(yīng)商設(shè)備封裝： 48-TQFP（7x7）
包裝： 帶卷 (TR)
配用： 576-3295-ND - BOARD EVALUATION KSZ8041TL
其它名稱： KSZ8041TLTR
KSZ8041TLTR-ND
Micrel, Inc.
KSZ8041TL/FTL
April 2007
24
M9999-042707-1.1
Collision Detection
The MAC regenerates the COL signal of the MII from TX_EN and CRS_DV.
Serial MII (SMII) Data Interface
The Serial Media Independent Interface (SMII) is the lowest pin count Media Independent Interface (MII). It provides a
common interface between physical layer and MAC layer devices, and has the following key characteristics:
Supports 10Mbps and 100Mbps data rates.
Uses 125 MHz reference clock provided by the MAC or the system board.
Uses 12.5 MHz sync pulse provided by the MAC.
Provides independent single-bit wide transmit and receive data paths for data and control information.
The KSZ8041TL/FTL is configured in SMII mode after it is power-up or reset with the following:
A 125 MHz reference clock connected to CLOCK (pin 15).
A 12.5 MHz sync pulse connected to SYNC (pin 36).
CONFIG[2:0] (pins 27, 41, 40) set to ‘010’.
In SMII mode, unused MII signals, TXD[3:2] (pins 39, 38), are tied to ground.
SMII Signal Definition
The following table describes the SMII signals. Refer to SMII Specification for detailed information.
SMII
Signal Name
Direction
(with respect to PHY,
KSZ8041TL/FTL signal)
Direction
(with respect to MAC)
Description
CLOCK
Input
Input, or Output
125 MHz clock reference for receive and
transmit data and control
SYNC
Input
Output
12.5 MHz sync pulse from MAC
TX
Input
Output
Transmit Data and Control
RX
Output
Input
Receive Data and Control
Table 4. SMII Signal Description
Clock Reference (CLOCK)
CLOCK is sourced by the MAC or system board. It is a continuous 125 MHz clock that provides the timing reference for
SYNC, TX, and RX.
Sync Pulse (SYNC)
SYNC is a 12.5 MHz synchronized pulse derived from CLOCK by the MAC. It is used to indicate the segment boundary
for each transmit data/control segment, or receive data/control segment. Each segment is comprised of ten bits.
SYNC is generated continuously by the MAC at every ten cycles of CLOCK.
Transmit Data and Control (TX)
TX provides transmit data and control information from MAC-to-PHY in 10-bit segments.
In 10Mbps mode, each segment is repeated ten times. Therefore, every ten segments represent a new byte of
data. The PHY can sample any one of every ten segments.
In 100Mbps mode, each segment represents a new byte of data.
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