參數(shù)資料
型號(hào)： KSZ8041FTL-EVAL
廠商： Micrel Inc
文件頁(yè)數(shù)： 55/58頁(yè)
文件大?。?/td> 0K
描述： KIT EVAL KSZ8041FTL EXPERIMENT
標(biāo)準(zhǔn)包裝： 1
主要目的： 接口，以太網(wǎng) PHY
嵌入式： 否
已用 IC / 零件： KSZ8041FTL
已供物品： 板
相關(guān)產(chǎn)品： 576-3347-ND - TXRX PHY 10/100 SGL LP 48-TQFP
576-1672-ND - IC TXRX PHY 10/100 LV/LP 48-TQFP
其它名稱： 576-3294
KSZ8041FTL-EVAL-ND
Micrel, Inc.
KSZ8041TL/FTL
April 2007
6
M9999-042707-1.1
List of Figures
Figure 1. Auto-Negotiation Flow Chart................................................................................................................................. 19
Figure 2. SMII Transmit Data/Control Segment................................................................................................................... 25
Figure 3. SMII Receive Data/Control Segment.................................................................................................................... 26
Figure 4. Typical Straight Cable Connection ....................................................................................................................... 27
Figure 5. Typical Crossover Cable Connection ................................................................................................................... 28
Figure 6. 25MHz Crystal / Oscillator Reference Clock for MII Mode ................................................................................... 30
Figure 7. 50MHz Oscillator Reference Clock for RMII Mode............................................................................................... 30
Figure 8. 125MHz Oscillator Reference Clock for SMII Mode ............................................................................................. 30
Figure 9. KSZ8041TL/FTL Power and Ground Connections............................................................................................... 31
Figure 10. KSZ8041FTL / KSZ8041TL Back-to-Back Media Converter .............................................................................. 33
Figure 11. MII SQE Timing (10Base-T) ............................................................................................................................... 45
Figure 12. MII Transmit Timing (10Base-T) ......................................................................................................................... 46
Figure 13. MII Receive Timing (10Base-T) .......................................................................................................................... 47
Figure 14. MII Transmit Timing (100Base-TX)..................................................................................................................... 48
Figure 15. MII Receive Timing (100Base-TX)...................................................................................................................... 49
Figure 16. RMII Timing – Data Received from RMII ............................................................................................................ 50
Figure 17. RMII Timing – Data Input to RMII ....................................................................................................................... 50
Figure 18. Auto-Negotiation Fast Link Pulse (FLP) Timing ................................................................................................. 51
Figure 19. MDC/MDIO Timing.............................................................................................................................................. 52
Figure 20. Reset Timing....................................................................................................................................................... 53
Figure 21. Recommended Reset Circuit.............................................................................................................................. 54
Figure 22. Recommended Reset Circuit for Interfacing with CPU/FPGA Reset Output ..................................................... 54
Figure 23. Reference Circuits for LED Strapping Pins......................................................................................................... 55
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
KSZ8041FTLI 功能描述:以太網(wǎng) IC Physical Layer Transceiver 10/100BASE-FX (Lead Free) RoHS:否 制造商:Micrel 產(chǎn)品:Ethernet Switches 收發(fā)器數(shù)量:2 數(shù)據(jù)速率:10 Mb/s, 100 Mb/s 電源電壓-最大:1.25 V, 3.45 V 電源電壓-最小:1.15 V, 3.15 V 最大工作溫度:+ 85 C 封裝 / 箱體:QFN-64 封裝:Tray
KSZ8041FTLI TR 功能描述:以太網(wǎng) IC Physical Layer Transceiver 10/100BASE-FX (Lead Free) RoHS:否 制造商:Micrel 產(chǎn)品:Ethernet Switches 收發(fā)器數(shù)量:2 數(shù)據(jù)速率:10 Mb/s, 100 Mb/s 電源電壓-最大:1.25 V, 3.45 V 電源電壓-最小:1.15 V, 3.15 V 最大工作溫度:+ 85 C 封裝 / 箱體:QFN-64 封裝:Tray
KSZ8041FTL-S 功能描述:以太網(wǎng) IC 10/100 PHY Fibre version and SMII RoHS:否 制造商:Micrel 產(chǎn)品:Ethernet Switches 收發(fā)器數(shù)量:2 數(shù)據(jù)速率:10 Mb/s, 100 Mb/s 電源電壓-最大:1.25 V, 3.45 V 電源電壓-最小:1.15 V, 3.15 V 最大工作溫度:+ 85 C 封裝 / 箱體:QFN-64 封裝:Tray
KSZ8041MLL 功能描述:以太網(wǎng) IC 3.3V, 10Base-T/100Base-TX Physical Layer Transceiver with MII Support - Lead Free RoHS:否 制造商:Micrel 產(chǎn)品:Ethernet Switches 收發(fā)器數(shù)量:2 數(shù)據(jù)速率:10 Mb/s, 100 Mb/s 電源電壓-最大:1.25 V, 3.45 V 電源電壓-最小:1.15 V, 3.15 V 最大工作溫度:+ 85 C 封裝 / 箱體:QFN-64 封裝:Tray
KSZ8041MLL TR 功能描述:以太網(wǎng) IC 3.3V, 10Base-T/100Base-TX Physical Layer Transceiver with MII Support - Lead Free RoHS:否 制造商:Micrel 產(chǎn)品:Ethernet Switches 收發(fā)器數(shù)量:2 數(shù)據(jù)速率:10 Mb/s, 100 Mb/s 電源電壓-最大:1.25 V, 3.45 V 電源電壓-最小:1.15 V, 3.15 V 最大工作溫度:+ 85 C 封裝 / 箱體:QFN-64 封裝:Tray
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